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3 Commits (5776511dd77bc1d953c890f4564ad5e7a38a5def)

Author SHA1 Message Date
AndreiGrozav f9c8ff26cf pluto rev C hardware updates 
-connect axi_spi to board GPIOs
-connect axi IIC to board GPIOs

MIO49 SPI_CS   (PS MIO49)
L10P  SPI_MOSI (AXI_SPI)
L12N  SPI_MISO (AXI_SPI)
L24N  SPI_CLK  (AXI_SPI)
L7N   iic_sda  (AXI_IIC)
L9N   iic_scl  (AXI_IIC)
 2020-01-16 11:40:28 +02:00
Laszlo Nagy 0261eade0c zynq:all: fix SPI clock constraint 
According to data sheets the EMIO SPI controller maximum frequency is
just 25MHz. Constrain the SPI clock accordingly.
 2019-08-09 16:39:56 +03:00
Rejeesh Kutty 2ececad58c sdrstk-2-pluto 2016-11-11 13:49:04 -05:00