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4 Commits (551319a670e8571dfcfdc40f4979b24a1f4b5d1c)

Author SHA1 Message Date
ATofan 2c898bf3a2 Added ZC706, ZC702 and ZED FMCOMMS2 Vivado Project 
ZC706 runs rx_clk at 250 MHz.
ZC702 and ZED run rx_clk at 200 MHz due to slower fabric.
The ZC702 and ZED projects need init_user in the boot procedure in order for the HP Ports to work correctly.
Both DDS and DMA mode work.
 2014-03-18 15:27:42 +02:00
ATofan ee56db8d50 FMCOMMS2: Modified FCLK2 to 125 MHz, and xdc file 
tcl: FCLK2 was modified from 100 MHz to 125 MHz.

xdc: rx_clk period constraint was redefined from 8ns (125 MHz) to 4ns (250 MHz)
 2014-03-14 16:27:56 +02:00
ATofan a6c3cb29c6 Modified SPI and ILA in fmcomms2_bd.tcl 2014-03-12 16:52:22 +02:00
Rejeesh Kutty 66c6b2b182 fmcomms2: added 2014-03-11 20:04:26 -04:00