5 Commits (501903bc817b24c42d9bce31a16441a27da0f2a0)

Author	SHA1	Message	Date
Dan Hotoleanu	f34b561e19	daq3: Parameterize JESD204 configuration values ... Added the capability to set the JESD204 configuration values from a single point in the code and to modify these default settings from the command line for the Xilinx FPGAs in the project. Signed-off-by: Dan Hotoleanu <dan.hotoleanu@analog.com>	2022-01-31 10:47:01 +02:00
Adrian Costina	9093a8c428	library: Move ad_iobuf to the common library, as it's not Xilinx specific ... Updated all system_project and Makefiles	2020-11-02 16:13:35 +02:00
Istvan Csomortani	a589753d92	project/scripts: Rename adi_project.tcl to adi_project_xilinx.tcl	2019-06-29 06:53:51 +03:00
Istvan Csomortani	43725429ac	adi_project: Rename the process adi_project_xilinx to adi_project	2019-06-29 06:53:51 +03:00
Adrian Costina	f5ed5def27	daq3: vcu118 initial commit	2019-04-17 14:24:35 +03:00