Rejeesh Kutty
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b3f06af77a
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altera srf files do not work
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2017-03-22 09:25:50 -04:00 |
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Rejeesh Kutty
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2e22ce3b62
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a10gx- ignore preliminary timing model warnings
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2017-03-21 10:52:28 -04:00 |
AndreiGrozav
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c1be17a3af
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Altera a10 devices: disable warnings regarding unused channels
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2017-03-01 11:32:17 +02:00 |
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Rejeesh Kutty
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917da79da1
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altera- source defaults for qsys-script
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2016-08-30 11:50:36 -04:00 |
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Rejeesh Kutty
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c6f4def93d
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altera- make mmu a make switch
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2016-08-08 11:54:51 -04:00 |
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Rejeesh Kutty
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d53b06849e
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daq2/a10gx- qsys updates
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2016-06-07 12:28:04 -04:00 |
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Rejeesh Kutty
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8b2542b181
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daq2/a10gx: 10AX115S3F45E2SGE3 version
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2016-04-20 16:01:12 -04:00 |
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AndreiGrozav
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679d471d75
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Merge branch 'hdl_2016_r1' into dev
hdl_2016_r1 contains IP core upgrades to Vivado 2015.4.2 and hdmi_tx improvements.
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2016-04-19 18:05:50 +03:00 |
Adrian Costina
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657144d9a7
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a10gx: Updated base design and DAQ2 to the new revision of the a10gx board
- tried using ATX PLL and fPLL for TX transceiver clocks, but could not get them to lock
- CMU PLL works correctly as temporary solution
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2016-03-28 13:21:36 +03:00 |
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Rejeesh Kutty
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f1b6577447
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a10gx/base: separate gpio in/out
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2015-12-10 16:04:54 -05:00 |
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Rejeesh Kutty
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a87b8fbf94
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a10gx- base system only
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2015-07-20 09:29:30 -04:00 |
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Rejeesh Kutty
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1f7745610e
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daq2- ddr updates
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2015-07-14 12:46:52 -04:00 |
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Rejeesh Kutty
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d111692608
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daq2/a10gx- ddr-ref @133
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2015-06-04 10:53:16 -04:00 |
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Rejeesh Kutty
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aa24c442f5
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a10gx- no-ddr
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2015-06-01 11:00:01 -04:00 |
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Rejeesh Kutty
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a6cae6b477
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iobuf: do is a system verilog keyword
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2015-05-21 14:06:17 -04:00 |
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Rejeesh Kutty
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b311b9dac6
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a10gx- updates
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2015-05-14 14:35:42 -04:00 |
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Rejeesh Kutty
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515dfd88d4
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a10gx- added
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2015-05-11 11:56:22 -04:00 |