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8 Commits (4a695692657e20ae22b87c86916e648e55d1a67e)

Author SHA1 Message Date
Lars-Peter Clausen f9628262aa axi_dmac: Add xfer_req signal to the streamin AXI source interface 
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
 2014-10-29 18:15:54 +01:00
Lars-Peter Clausen c2ed80e8bb axi_dmac: Drive unused signals to 0 
This silences a few warnings from the tools about undriven signals.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
 2014-10-10 16:20:49 +03:00
Lars-Peter Clausen 8a2b29cdbe axi_damc: Add xfer_req to the FIFO source interface 
The xfer_req signal will be high if DMA core the is expecting data.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
 2014-07-02 16:05:16 +02:00
Lars-Peter Clausen dc7b3e085c axi_dmac: Fix issues with non 64-bit AXI masters 
Make sure that the address generator behaves correctly when the buswidth is not
64-bit. Also since the source and destination can have different widths add
separate parameters for source and destination address alignment.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
 2014-04-10 14:54:22 +02:00
Lars-Peter Clausen 9b4539b7c2 axi_dmac: Add option to configure the FIFO size 
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
 2014-03-26 12:51:35 +01:00
Lars-Peter Clausen e373b85954 axi_dmac: Fix Vivado warnings 
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
 2014-03-18 20:59:13 +01:00
Lars-Peter Clausen f02ba999ae axi_dmac: Add support for DMA bus widths other than 64 bit 
There were a few place in the core where it assumed a 64-bit wide bus. Make this
configurable using parameters. The patch also adds support for having different
DMA bus widths on the source and destination side.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
 2014-03-13 13:20:10 +01:00
Adrian Costina 831c19ea84 Added axi_dmac, axi_fifo and misc files in library 2014-03-06 18:16:02 +02:00