Commit Graph

8 Commits (3e297f54dde3c58d39db50a4716c10ace588329e)

Author SHA1 Message Date
Iacob_Liviu 482f0489a3 scripts: Merge adi_env.tcl into a single file
Move the new adi_env.tcl file from hdl/projects/scripts into hdl/scrips
2022-08-08 13:52:54 +03:00
Adrian Costina 62dc310794 Revert "intel: Update projects to use ad_iobuf instead of ALT_IOBUF"
This reverts commit a3a610728c.

Quartus doesn't instantiate correctly the buffer
2022-02-09 17:39:29 +02:00
Adrian Costina a3a610728c intel: Update projects to use ad_iobuf instead of ALT_IOBUF 2020-11-02 16:13:35 +02:00
Istvan Csomortani 522aacf6d8 ad_fmclidar1_ebz/a10soc: Fix AFE's I2C interface
The AFE's I2C interface should be pin-multiplexed to the FPGA. Also, add
a bidirectional IO buffer for the interface, and make sure it has weak
pull-up resistors.
2020-03-17 07:27:49 +00:00
Istvan Csomortani b3e475cb8b ad_fmclidar1_ebz: Update the IO constraints to revB
The IO location of the laser_driver_otw_n was moved from FMC_HPC_LA27_N
to FMC_HPC_LA31 (laser_gpio[12]).
laser_gpio[11:0] assignments were shifted with one bit to MSB, and laser_gpio[0]
got the old location of the laser_driver_otw_n.
2020-01-31 18:47:37 +02:00
Istvan Csomortani 03bec4b49c ad_fmclidar1_ebz: Interchange SYSREF and DEV_CLK ports location
In ZCU102 LA01_CC_P|N are connected to regional clock, but in order to
receive a device clock properly we have to use pin which is connected
to a  global clock buffer. Luckily SYSREF is connected to global clock
pin; swap to port to receive the device clock correctly.

Also, swap the ports in both ZC706 and A10SOC carriers.
2019-10-17 09:59:23 +03:00
Istvan Csomortani 3084a5d9aa ad_fmclidar1_ebz/a10soc: Fix the comment about the carrier re-work
The project is using the FMCA connector of the board. Make sure that all
the carrier re-work is related to the FMCA connector.
2019-10-17 09:58:52 +03:00
Istvan Csomortani 2344778dd8 ad_fmclidar1_ebz/a10soc: Initial commit
Add initial support for Arria 10 SOC carrier.
2019-10-02 15:32:17 +03:00