Commit Graph

59 Commits (3cd82c989c169747188bd9e8c8395c225176f50b)

Author SHA1 Message Date
Istvan Csomortani 6e6f1347d7 project/scripts: Rename adi_project_alt.tcl to adi_project_intel.tcl 2019-06-29 06:53:51 +03:00
Istvan Csomortani ec67a381e4 adi_project: Rename the process adi_project_altera to adi_project 2019-06-29 06:53:51 +03:00
Istvan Csomortani 79b6ba29ce all: Rename altera to intel 2019-06-29 06:53:51 +03:00
Istvan Csomortani 70b7d69ff8 whitespace: Delete all trailing white spaces 2019-06-07 10:20:15 +03:00
Lars-Peter Clausen 27c3231c1b arradio: Use new pack/unpack infrastructure
Use the new util_cpack2 and util_upack2 cores. They have lower utilization
that the old util_cpack and util_upack cores.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2018-11-28 11:33:11 +02:00
Lars-Peter Clausen 2b914d33c1 Move Altera IP core dependency tracking to library Makefiles
Currently the individual IP core dependencies are tracked inside the
library Makefile for Xilinx IPs and the project Makefiles only reference
the IP cores.

For Altera on the other hand the individual dependencies are tracked inside
the project Makefile. This leads to a lot of duplicated lists and also
means that the project Makefiles need to be regenerated when one of the IP
cores changes their files.

Change the Altera projects to a similar scheme than the Xilinx projects.
The projects themselves only reference the library as a whole as their
dependency while the library Makefile references the individual source
dependencies.

Since on Altera there is no target that has to be generated create a dummy
target called ".timestamp_altera" who's only purpose is to have a timestamp
that is greater or equal to the timestamp of all of the IP core files. This
means the project Makefile can have a dependency on this file and make sure
that the project will be rebuild if any of the files in the library
changes.

This patch contains quite a bit of churn, but hopefully it reduces the
amount of churn in the future when modifying Altera IP cores.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2018-04-11 15:09:54 +03:00
Lars-Peter Clausen 377247a434 Regenerate project Makefiles using the new shared Makefile includes
This reduces the amount of boilerplate code that is present in these
Makefiles by a lot.

It also makes it possible to update the Makefile rules in future without
having to re-generate all the Makefiles.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2018-04-11 15:09:54 +03:00
Istvan Csomortani 425e803364 license: Fix a spelling mistake 2018-04-11 15:09:54 +03:00
Rejeesh Kutty 58572d746c arradio/c5soc- rd10102013_979 fix 2017-09-05 12:52:41 -04:00
Rejeesh Kutty 6736aaeca1 arradio- add control/status ports 2017-09-01 14:39:18 -04:00
Rejeesh Kutty bb73e7a40f arradio- add control/status ports 2017-09-01 14:39:18 -04:00
Rejeesh Kutty 1c386d4d34 hdlmake.pl- updates 2017-08-07 16:09:20 -04:00
Rejeesh Kutty 8b31fe73e0 hdlmake.pl updates 2017-07-21 10:37:56 -04:00
Rejeesh Kutty a8ade15173 hdlmake.pl - updates 2017-07-20 15:11:21 -04:00
Rejeesh Kutty d132ed45cd arradio- timing violations fix 2017-07-20 15:08:21 -04:00
Rejeesh Kutty 3ef00475bc arradio/c5soc- clocking changes 2017-07-20 13:05:07 -04:00
AndreiGrozav a765a9c709 arradio: Add i2c interface 2017-06-29 17:26:58 +03:00
Rejeesh Kutty 6decba3c3b hdlmake.pl updates 2017-06-09 16:23:17 -04:00
Rejeesh Kutty f3af192f30 altera 16.1 arradio updates 2017-06-08 15:02:46 -04:00
Rejeesh Kutty dd48929327 hdlmake.pl - updates 2017-06-06 12:25:35 -04:00
Istvan Csomortani 50cdb6db67 Merge branch 'jesd204' into dev 2017-05-31 20:44:32 +03:00
Istvan Csomortani 84b2ad51e2 license: Add some clarification to the header license 2017-05-31 18:18:56 +03:00
Istvan Csomortani 85ebd3ca01 license: Update license terms in hdl source files
Fix a few gramatical error, fix the path of the top level license
files.
2017-05-29 09:55:41 +03:00
Istvan Csomortani 4c998d1e18 make: Update make files 2017-05-25 15:12:17 +03:00
Lars-Peter Clausen 01aea161fa Create CDC helper library
Move the CDC helper modules to a dedicated helper modules. This makes it
possible to reference them without having to use file paths that go outside
of the referencing project's directory.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2017-05-23 11:16:07 +02:00
Istvan Csomortani 9055774795 all: Update license for all hdl source files
All the hdl (verilog and vhdl) source files were updated. If a file did not
have any license, it was added into it. Files, which were generated by
a tool (like Matlab) or were took over from other source (like opencores.org),
were unchanged.

New license looks as follows:

Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.

Each core or library found in this collection may have its own licensing terms.
The user should keep this in in mind while exploring these cores.

Redistribution and use in source and binary forms,
with or without modification of this file, are permitted under the terms of either
 (at the option of the user):

  1. The GNU General Public License version 2 as published by the
     Free Software Foundation, which can be found in the top level directory, or at:
https://www.gnu.org/licenses/old-licenses/gpl-2.0.en.html

OR

  2.  An ADI specific BSD license as noted in the top level directory, or on-line at:
https://github.com/analogdevicesinc/hdl/blob/dev/LICENSE
2017-05-17 11:52:08 +03:00
Adrian Costina 942d69a30c Makefiles: Change MMU enabling parameter for altera designs from MMU to NIOS2_MMU 2017-04-18 10:57:16 +03:00
Rejeesh Kutty d84e34fe5f arradio/c5soc- reset false path for vga dma 2017-03-21 10:15:38 -04:00
Rejeesh Kutty 8063ba2b66 make updates 2017-03-20 16:05:18 -04:00
Rejeesh Kutty c7351f3ce3 arradio/c5soc- remove qsys files 2017-03-20 15:56:07 -04:00
Rejeesh Kutty 589e6b53d8 arradio/c5soc- qsys-script flow 2017-03-20 15:42:33 -04:00
Adrian Costina 8ebc8fe4e2 updated makefiles 2016-12-09 23:06:41 +02:00
Rejeesh Kutty 0dfbb0af11 arradio/c5soc- constraints changes- interface 1r1t 2016-11-03 11:25:52 -04:00
Rejeesh Kutty 671a547c2b hdlmake- updates 2016-11-01 12:41:25 -04:00
AndreiGrozav b8363d778d arradio: Makefile update 2016-10-25 20:36:56 +03:00
Rejeesh Kutty cb97bc500a hdlmake updates 2016-10-17 16:29:57 -04:00
Rejeesh Kutty 905e29eb01 hdlmake- altera 2016-10-10 12:55:55 -04:00
Istvan Csomortani 16ee1336c3 Makefile: Update make files 2016-09-15 11:41:06 +03:00
Rejeesh Kutty f697490de6 hdlmake- updates 2016-08-19 15:59:41 -04:00
Adrian Costina 0b0aa8e6c0 Makefile: Add MMU option to altera makefiles 2016-08-11 17:46:54 +03:00
Istvan Csomortani 0cd608a7e2 lib_refactoring: Update Make files 2016-08-08 16:38:38 +03:00
Istvan Csomortani f784557895 lib_refactoring: IOBUF is a Xilinx macro, no need to use with Altera 2016-08-08 15:06:34 +03:00
Adrian Costina d60bce654c Makefiles: Updated Makefiles so they run correctly with gnuwin32 tools 2016-08-05 15:16:04 +03:00
Rejeesh Kutty eaf4d4a19d makefile updates 2016-06-10 14:26:14 -04:00
Rejeesh Kutty 09520709b0 make updates 2016-05-20 12:35:45 -04:00
Rejeesh Kutty 50d018fc11 arradio- rfifo/wfifo added 2016-05-18 13:24:13 -04:00
Rejeesh Kutty 0041bf69be c5soc- remove unused hps ports 2016-05-09 13:54:08 -04:00
Istvan Csomortani b0538a03a2 Make: Update 2016-05-06 16:44:24 +03:00
Adrian Costina 43e03ca6f7 arradio: Updated project
- made the reset bridges asynchronous
- connected the arradio gpio to the CPU interconnect
2016-02-16 14:50:23 +02:00
Adrian Costina 2309c4d83c Makefiles: Removed " from path 2015-11-27 14:02:46 +02:00