Commit Graph

30 Commits (3cd82c989c169747188bd9e8c8395c225176f50b)

Author SHA1 Message Date
Arpadi 0680e44330 system_id: deployed ip 2019-08-06 16:53:11 +03:00
Istvan Csomortani a589753d92 project/scripts: Rename adi_project.tcl to adi_project_xilinx.tcl 2019-06-29 06:53:51 +03:00
Istvan Csomortani 43725429ac adi_project: Rename the process adi_project_xilinx to adi_project 2019-06-29 06:53:51 +03:00
Istvan Csomortani 7fa620d253 gtm_projects: Update system_top
In the latest system_top file we are not bringing out all the interrupt
signals from the block design. Delete all interrupt ports from the
system_wrapper instance.

Following projects were changed:

  - AD5766_SDZ
  - AD7134_FMC
  - AD7616_SDZ
  - AD77681EVB
  - AD7768EVB
  - ADAQ7980
2019-06-28 11:18:29 +03:00
Istvan Csomortani 21ce53f765 Revert "Move GTM projects to gtm_projects branch"
This reverts commit 171093eca4.
2019-06-28 11:18:29 +03:00
Adrian Costina 171093eca4 Move GTM projects to gtm_projects branch 2018-06-15 16:28:40 +03:00
Lars-Peter Clausen 377247a434 Regenerate project Makefiles using the new shared Makefile includes
This reduces the amount of boilerplate code that is present in these
Makefiles by a lot.

It also makes it possible to update the Makefile rules in future without
having to re-generate all the Makefiles.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2018-04-11 15:09:54 +03:00
Istvan Csomortani 425e803364 license: Fix a spelling mistake 2018-04-11 15:09:54 +03:00
Adrian Costina 98b58562d6 system_top: Non functional changes in system_tops to reduce warnings
Loop back the unused GPIO pins, and add all the SPI interface to system
wrapper instance.

The following system_top modules were changed:
  - ad738x_fmc
  - ad7616_sdz
  - ad77681evb
  - ad77681evb
  - ad7768evb
  - ad9739a_fmc
  - ad9434
  - adrv9739
  - fmcadc5
  - ad6676evb
  - ad9265
  - ad5766
  - fmcomms5
  - m2k
2018-04-11 15:09:54 +03:00
Istvan Csomortani a740b6012f Make: Use $(MAKE) for recursive make commands
This commit should resolve the issue #64.

Recursive make commands should always use the variable MAKE, not the explicit
command name ‘make’.
2018-03-07 07:40:19 +00:00
Adrian Costina b7ca17f02b scripts: Change adi_project_create to adi_project_xilinx for creating xilinx projects 2017-06-07 12:06:50 +03:00
Istvan Csomortani 84b2ad51e2 license: Add some clarification to the header license 2017-05-31 18:18:56 +03:00
Istvan Csomortani 85ebd3ca01 license: Update license terms in hdl source files
Fix a few gramatical error, fix the path of the top level license
files.
2017-05-29 09:55:41 +03:00
Istvan Csomortani 9055774795 all: Update license for all hdl source files
All the hdl (verilog and vhdl) source files were updated. If a file did not
have any license, it was added into it. Files, which were generated by
a tool (like Matlab) or were took over from other source (like opencores.org),
were unchanged.

New license looks as follows:

Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.

Each core or library found in this collection may have its own licensing terms.
The user should keep this in in mind while exploring these cores.

Redistribution and use in source and binary forms,
with or without modification of this file, are permitted under the terms of either
 (at the option of the user):

  1. The GNU General Public License version 2 as published by the
     Free Software Foundation, which can be found in the top level directory, or at:
https://www.gnu.org/licenses/old-licenses/gpl-2.0.en.html

OR

  2.  An ADI specific BSD license as noted in the top level directory, or on-line at:
https://github.com/analogdevicesinc/hdl/blob/dev/LICENSE
2017-05-17 11:52:08 +03:00
Istvan Csomortani 1c23cf4621 all: Update verilog files to verilog-2001 2017-04-13 11:59:55 +03:00
Adrian Costina 8ebc8fe4e2 updated makefiles 2016-12-09 23:06:41 +02:00
Istvan Csomortani 0cd608a7e2 lib_refactoring: Update Make files 2016-08-08 16:38:38 +03:00
Istvan Csomortani df36902713 lib_refactoring: Fix path of the IO macros 2016-08-08 15:07:19 +03:00
Adrian Costina d60bce654c Makefiles: Updated Makefiles so they run correctly with gnuwin32 tools 2016-08-05 15:16:04 +03:00
Rejeesh Kutty e42b4ea378 hdlmake- updates 2016-08-04 13:28:25 -04:00
Istvan Csomortani 7ca8e10004 make: Update Make files 2016-08-01 14:24:48 +03:00
Istvan Csomortani 427cc84bb2 axi_ad7616: Rename the physical interface signals to rx_*
No functional modification.
2016-07-01 14:45:23 +03:00
Istvan Csomortani 8d558b2538 make: Update Make files 2016-06-29 14:50:07 +03:00
Istvan Csomortani 160d54f311 ad7616_sdz: Some comment rephrase 2016-04-29 16:41:35 +03:00
Istvan Csomortani 1fd5c0f28b ad7616_sdz: Fix IO definitions for the parallel interface. 2016-04-25 10:56:45 +03:00
Istvan Csomortani 6de356e8fc ad7616_sdz: Fix the data width at i_iobuf_adc_cntrl 2016-04-25 10:55:37 +03:00
Istvan Csomortani 7ce3f6e274 ad7616_sdz: Fix system top for parallel interface mode. 2016-03-24 13:49:30 +02:00
Istvan Csomortani a1c2c61884 ad7616_sdz: Update the IOBUF instance names 2016-03-24 11:46:33 +02:00
Istvan Csomortani a74e2061e9 ad7616_sdz: BUSY is input for the FPGA 2016-02-03 14:12:00 +02:00
Istvan Csomortani 59783f6cff ad7616_sdz: Add support for Zedboard 2016-01-29 15:28:06 +02:00