Commit Graph

2839 Commits (39a5534e00e4d0c4333a188af67ef458e4f6130e)

Author SHA1 Message Date
Rejeesh Kutty 3871d3ce2b ad9361-c5/a10 - updates 2016-05-09 13:54:08 -04:00
Rejeesh Kutty 9cd6e2da51 quartus-mess- altddio direct instantiation 2016-05-09 13:54:08 -04:00
AndreiGrozav 726ddb6e93 ad_lvds_clk: Fixed assignment mismatched 2016-05-09 10:32:18 +03:00
AndreiGrozav 8d72b645ae fmcomms2/common: Remove ila_tdd block 2016-05-09 10:28:10 +03:00
Istvan Csomortani b0538a03a2 Make: Update 2016-05-06 16:44:24 +03:00
AndreiGrozav b36c722ec9 up_hdmi_tx: Discard the standard default values
Restore the base functionality of the core. Changing the data format
will not set by default its standard maximum and minimum data clipping
ranges.
2016-05-05 13:41:46 +03:00
AndreiGrozav 68d83def01 axi_hdmi_tx_core: Fixed data path 2016-05-05 13:32:25 +03:00
AndreiGrozav 0d2dc2c62b axi_hdmi_tx: Fixed data bus width 2016-05-05 13:26:59 +03:00
Istvan Csomortani 4863a04132 axi_adc/dacfifo: Split the intergration script file
Split the integration script file into two separate script files. Rename the
integration processes names to be more meaningful.
2016-05-05 09:53:55 +03:00
Rejeesh Kutty ddfaff2cf5 fmcomms2/a10soc: compile version 2016-05-04 13:42:12 -04:00
Rejeesh Kutty f4e5965936 fmcomms2/a10soc: ip updates 2016-05-04 13:42:12 -04:00
Rejeesh Kutty 92dcce1674 a10soc: default ports 2016-05-04 13:42:12 -04:00
Rejeesh Kutty bdfa383622 library/axi_ad9361: tdd false paths 2016-05-04 13:42:12 -04:00
Rejeesh Kutty ef6c99ecab library/axi_ad9361: hw component updates 2016-05-04 13:42:12 -04:00
Rejeesh Kutty 3b5e44e37d library/axi_ad9361: mmcm rst for plls 2016-05-04 13:42:12 -04:00
Rejeesh Kutty 16a13b2023 library/axi_ad9361: add rst/locked to clock 2016-05-04 13:42:11 -04:00
Rejeesh Kutty 1aac44b0d9 library: ad_*clk- rst/locked 2016-05-04 13:42:11 -04:00
Rejeesh Kutty d82ca5dc3c library/common- altera variations 2016-05-04 13:42:11 -04:00
AndreiGrozav be74db656c ad6674evb, fmcadc2, fmcadc4, fmcadc5, fmcjesdadc1:
Update system_project.tcl scripts to correctly select the necessary
constraint files
2016-05-04 19:37:33 +03:00
AndreiGrozav b6b68e9ab7 axi_jesd_gt: Split the constraint file
-split axi_jesd_gt_constr.xdc file in rx, tx and common constraint files
-updated tcl script
2016-05-04 19:32:06 +03:00
AndreiGrozav 3ca3414522 fmcadc2: Fixed bus data width 2016-05-04 19:20:01 +03:00
AndreiGrozav 9104b2cc60 ad6676evb, fmcadc2, fmcadc4, fmcadc5,...
ad6676evb, fmcadc2, fmcadc4, fmcadc5, fmcjesdadc1: Remove unused
set_proprieties
2016-05-04 19:13:25 +03:00
István Csomortáni 583bafd17a axi_ad7616: Add a new register for IF_TYPE
Add an additional new read only register at 0x03 address for the interface type. This way the software can verify the actual interface mode.
2016-05-04 16:14:29 +03:00
Rejeesh Kutty 385ed31a45 make files update 2016-04-29 10:17:35 -04:00
Rejeesh Kutty 3f5e1e1203 ad9361- dev_if module name change 2016-04-29 10:17:35 -04:00
Rejeesh Kutty 61b531b1c1 a10soc device update 2016-04-29 10:17:35 -04:00
Rejeesh Kutty 89f5d2394e altera- clock variations 2016-04-29 10:17:35 -04:00
Rejeesh Kutty 243d3e6e41 ad9361- a10soc sdc files 2016-04-29 10:17:35 -04:00
Rejeesh Kutty aa2aa902bf ad9361- a10soc updates 2016-04-29 10:17:35 -04:00
Rejeesh Kutty f411d29e30 ad9361- a10soc changes 2016-04-29 10:17:35 -04:00
Rejeesh Kutty 3563c2212c common/altera- removed dcfilt/mul 2016-04-29 10:17:35 -04:00
Rejeesh Kutty 0260280db1 common/altera- data path 2016-04-29 10:17:35 -04:00
Rejeesh Kutty ed62101308 common/altera: primitives 2016-04-29 10:17:35 -04:00
Rejeesh Kutty 779d014750 ad9361-common alt/xil interface 2016-04-29 10:17:35 -04:00
Istvan Csomortani 160d54f311 ad7616_sdz: Some comment rephrase 2016-04-29 16:41:35 +03:00
Istvan Csomortani 7ec4c00f9f axi_ad7616: DMA is always ready 2016-04-29 16:36:33 +03:00
Istvan Csomortani 427f85959c axi_ad7616: Fix the AXI stream interface 2016-04-29 16:34:34 +03:00
Istvan Csomortani 33199263e1 axi_ad7616: Delete burst_length register
This was an unnecessary feature of the hdl core.
2016-04-29 16:28:48 +03:00
Rejeesh Kutty 664ea16a0f ccpci- carrier changes 2016-04-27 16:26:11 -04:00
Rejeesh Kutty e790e4c3ae a10soc- complete qsys 2016-04-25 12:56:19 -04:00
Rejeesh Kutty bfa6fe2a40 a10soc- updates 2016-04-25 11:23:16 -04:00
Rejeesh Kutty 28159aeec9 a10soc- updates 2016-04-25 11:11:46 -04:00
Rejeesh Kutty 0a3967b886 a10soc- updates 2016-04-25 10:53:26 -04:00
Rejeesh Kutty d36d1263c5 a10soc- updates 2016-04-25 10:50:09 -04:00
Istvan Csomortani d5d7c12f0e axi_ad7616: Fix the register map 2016-04-25 11:36:39 +03:00
Istvan Csomortani 2ccdd426ec axi_ad7616: Fix the rd_db_valid generation and do some cosmetic changes. 2016-04-25 11:28:22 +03:00
Istvan Csomortani 1fd5c0f28b ad7616_sdz: Fix IO definitions for the parallel interface. 2016-04-25 10:56:45 +03:00
Istvan Csomortani 6de356e8fc ad7616_sdz: Fix the data width at i_iobuf_adc_cntrl 2016-04-25 10:55:37 +03:00
Istvan Csomortani ad227c1af0 up_axi: Wait more to a valid read acknowledge. 2016-04-25 10:34:17 +03:00
Rejeesh Kutty 2a5f31d26b fmcomms2/a10soc- copy 2016-04-22 15:15:44 -04:00