3e57ff1fc5
z-mpsoc- map 0x4-0x8,0x7-0x9
2016-12-20 16:14:38 -05:00
22e230618c
scripts/adi_board.tcl- support multiple xcvrs
2016-11-23 16:22:05 -05:00
8f562fd069
xcvr updates- board procedure
2016-11-22 14:43:36 -05:00
750b23621b
board-tcl: xcvr qpll/cpll changes
2016-11-22 12:53:02 -05:00
4a5b7fc723
scripts- reconnect added
2016-09-29 11:50:58 -04:00
79b9e21be8
board- xcvr procedure
2016-09-26 15:20:18 -04:00
cd0c981b50
projects/scripts: Fix to prevent a warning
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In case of axi_interconnects, when just one slave and master interface is
active, the 'Interconnect Optimization Strategy' is disabled. So this
parameter should be set just if there is more than one slave interface.
2016-08-26 10:08:00 +03:00
6ab137a0e9
projects/scripts: Cosmetics
2016-08-26 10:07:08 +03:00
f1b834ab25
scripts: Update script so that all interconnects are optimized for performance
2016-08-22 16:56:02 +03:00
3b2bde2fa1
hdl-vivado-2016.2- min. addr-space requirement
2016-07-28 13:44:57 -04:00
16e3a0e569
zcu102- updates
2016-05-10 15:40:41 -04:00
bf6ef4e5f3
board- add disconnect
2016-04-11 15:33:00 -04:00
c53f8c15ee
Add CN0363 project
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Add support for the CN0363 (colorimeter) board connected to the ZED board.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2015-05-21 17:21:35 +02:00
ee2cd034bc
scripts: add gnd/vcc connections
2015-03-26 10:08:01 -04:00
f7dd466469
adi_board.tcl : Fix some issue with the ad_mem_hpx_interconnect
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Sometimes the find_bd_objs does not do its job, so need to double check that the interface clock is already connected to the p_clock or not.
Not sure about the cause of this behavior, need more investigation. Issue was found first at KC705 base design.
2015-03-13 18:51:21 +02:00
17d8c1b72b
daq2: move intrs into ipi
2015-03-12 16:17:17 -04:00
c0eef42647
adi_board: enable ps7 hp if needed
2015-03-09 16:12:23 -04:00
ed28b47203
board: optimize interconnect for performance
2015-03-06 12:38:52 -05:00
0ac1676318
daq2+base: board tcl updates
2015-03-05 10:56:36 -05:00
0258afbadc
board: add ddr seg variable
2015-01-09 14:12:50 -05:00
c1268f089d
scripts: hp/mem updates
2014-11-10 15:06:20 -05:00
fd66affa42
scripts: add default memory interconnect
2014-10-27 15:53:20 -04:00
fc4e002150
scripts: add mb cpu side
2014-10-27 15:53:19 -04:00
210da4116f
scripts: initial commit
2014-10-03 16:13:34 -04:00
179d6d601c
adi_board.tcl : Use 'global' instead of '$::'
2014-04-14 11:45:35 +03:00
c718169f27
adi_board.tcl : Fix the address assignment command
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A lot of cores have more than one address segments, therefor need
to filter out the segment of the axi lite interface
2014-04-11 16:14:56 +03:00
cf5b9b51fd
adi_board.tcl : Fix spi ports and hp clocks
2014-04-11 15:31:12 +03:00
37e2059fd0
adi_board.tcl : General update
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- Split the adi_dma_interconnect to two procedure:
adi_dma_interconnect and adi_hp_assign
- Fix the adi_spi_core
- Fix the adi_interconnect_lite
2014-04-10 18:29:14 +03:00
8deb36ce08
adi_board.tcl: All procedures works on Zynq/Microblaze
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General patch for the integration procedures. Tested on kc705 and
zed.
2014-04-01 16:19:24 +03:00
4ef88a3bed
adi_board.tcl : Patch for adi_spi_core process
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- Fix indentation
- Pacth for adi_spi_core process
2014-03-31 16:41:07 +03:00
7f4f200fce
Project scripts: Initial check in of adi_board.tcl
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The script contains integration tcl processes.
2014-03-26 19:08:56 +02:00
Rejeesh Kutty
Istvan Csomortani
Adrian Costina
Shrutika Redkar
Lars-Peter Clausen