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9 Commits (2f35ce8a5126ef2a358f7b07087b48160bb9f278)

Author SHA1 Message Date
LIacob106 58c1d2e3b2 projects: fixed xcvr clocks that generated critical warning 2021-11-09 12:40:14 +02:00
LIacob106 d4126739b4 projects: remove hardcoded div_clk from xcvr 2021-10-27 12:11:22 +03:00
Adrian Costina bbb5a31994 Reviewed pinout of ZCU102 projects. fmcomms5 pin gpio_ad5355_lock location changed 2018-04-21 15:28:13 +03:00
Istvan Csomortani 7824f79fc0 adrv9371x:zcu102: Use explicit PACKAGE_PIN definitions for JESD204 lanes and reference clocks 2018-04-11 15:09:54 +03:00
AndreiGrozav 502989c25f jesd_rst_gen:constraints: Remove invalid false path definitions 
The constraint where added to remove timing problems on the reset path.

The constraint paths do not match anymore. The resets are used in a synchronous
way so we don't need the timing exceptions anyway.

Projects affected by this change:
  - daq3
  - adrv9739
  - ad6676evb
  - fmcadc5
  - daq2/kcu105
  - fmcadc2
  - adrv9371x
  - fmcomms11/zc706
  - fmcjesdadc1
 2018-04-11 15:09:54 +03:00
AndreiGrozav f1e51a8b89 adrv9371x_zcu102: Fix rx_div_clk constraint placement 2017-11-20 15:36:51 +00:00
Lars-Peter Clausen caac2ce588 adrv9371x: zcu102: Fix lane mapping 
Fix the location assignment of the transceiver blocks to get the correct
lane mapping.

Note that the comments indicating the expected lane mapping are correct,
but the actual transceiver location assignments were not.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
 2017-11-14 14:31:03 +01:00
AndreiGrozav 22808fa03c zcu102: Update to rev 1.0 2017-11-08 10:33:12 +02:00
AndreiGrozav d05ed29212 adrv9371x_zcu102: Initial commit 2017-08-22 15:48:03 +03:00