Rejeesh Kutty
1f7745610e
daq2- ddr updates
2015-07-14 12:46:52 -04:00
Rejeesh Kutty
a2e7fb9491
daq2/a10gx: qsys signal tap version
2015-07-13 10:07:18 -04:00
Rejeesh Kutty
825fddd034
transceiver split up outside qsys
2015-07-10 11:45:07 -04:00
Rejeesh Kutty
8c0d74aa90
transceiver split up outside qsys
2015-07-10 11:44:42 -04:00
Rejeesh Kutty
e40aac9ab6
transceiver split up outside qsys
2015-07-10 11:44:22 -04:00
Rejeesh Kutty
f1dd2435b4
signal tap removed
2015-07-08 15:47:31 -04:00
Rejeesh Kutty
c9e73b023d
signal tap removed
2015-07-08 15:46:52 -04:00
Rejeesh Kutty
075b1e5424
daq2/a10gx: added axi_jesd_xcvr control
2015-07-07 10:22:36 -04:00
Istvan Csomortani
46fa91d5be
Makefile: Update Make files
2015-07-03 18:08:57 +03:00
Rejeesh Kutty
6bc24e25eb
stap- need to be qsys
2015-06-29 13:26:32 -04:00
Rejeesh Kutty
d25e02d7ee
stap- need to be qsys
2015-06-29 13:26:20 -04:00
Lars-Peter Clausen
6862655b0d
Add .gitattributes file
...
Add .gitattributes file which sets up the eol encoding handling. This will
make sure that we get a uniform eol encoding across different operating
systems.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2015-06-26 11:07:10 +02:00
Rejeesh Kutty
714d415804
daq2/a10gx- signaltap changes
2015-06-19 14:33:04 -04:00
Rejeesh Kutty
51e6a74a3d
daq2/a10gx- add xmit swap
2015-06-19 14:32:59 -04:00
Rejeesh Kutty
d6b1260678
daq2/a10gx- signal tap + gpio
2015-06-19 14:32:58 -04:00
Rejeesh Kutty
67df6b3ea8
a10gx- disable lab cell on dsp input register
2015-06-19 14:32:54 -04:00
Rejeesh Kutty
4c80013faf
projects/daq2: gt lane split
2015-06-12 15:56:03 -04:00
Istvan Csomortani
e6525136a9
daq2/common: axi_ad9144_fifo needs a proper reset sequence
...
Connect the axi_ad9144_fifo/dma_rst signal to sys_cpu_reset
2015-06-12 14:03:46 +03:00
Rejeesh Kutty
f587aa42d9
a10gx- tx sync
2015-06-10 14:32:25 -04:00
Rejeesh Kutty
e3e4af5c51
daq2/zc706: open ports
2015-06-10 14:25:58 -04:00
Rejeesh Kutty
00b8c171b8
a10gx: pll locked to reset controller
2015-06-08 15:00:11 -04:00
Rejeesh Kutty
f81d22a17a
altera- common timing check
2015-06-04 10:56:32 -04:00
Rejeesh Kutty
d111692608
daq2/a10gx- ddr-ref @133
2015-06-04 10:53:16 -04:00
Rejeesh Kutty
f9ffaf457d
projects/daq2- drp moved to up clock
2015-06-01 13:39:26 -04:00
Rejeesh Kutty
4a701d3895
a10gx- no-ddr
2015-06-01 11:00:02 -04:00
Rejeesh Kutty
a6cae6b477
iobuf: do is a system verilog keyword
2015-05-21 14:06:17 -04:00
Rejeesh Kutty
ad3198f623
a10gx: top level fixes
2015-05-21 14:06:15 -04:00
Lars-Peter Clausen
6b9906b22b
Refresh Makefiles
...
Re-generate the Makefiles after a small update to the generation script:
- Entries are sorted alphabetically
- Empty dependency lines are skipped
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2015-05-21 14:21:54 +02:00
Rejeesh Kutty
19b094cab5
daq2/a10gx- added jesd align
2015-05-20 15:39:27 -04:00
Rejeesh Kutty
f1c30ac225
daq2/a10gx- qsys updates
2015-05-20 14:24:49 -04:00
Rejeesh Kutty
52b6077a46
a10gx- 15.0 updates
2015-05-19 15:12:23 -04:00
Adrian Costina
c19749361d
Makefiles: Updated makefiles to have as a result the programming file instead of the project file.
...
Also fixed altera projects dependencies
2015-05-18 17:22:46 +03:00
Rejeesh Kutty
672a5a4dfa
a10gx- updates
2015-05-14 14:35:43 -04:00
Rejeesh Kutty
848dac70d5
a10gx: updates--
2015-05-11 11:56:27 -04:00
Rejeesh Kutty
dc0eea5f0f
a10gx: updates--
2015-05-11 11:56:26 -04:00
Rejeesh Kutty
bdc3f3d807
a10gx: updates--
2015-05-11 11:56:24 -04:00
Rejeesh Kutty
75e055dab9
daq2/a10gx- initial commit
2015-05-11 11:56:23 -04:00
Istvan Csomortani
15618c9edf
daq2 : Integrate the DACFIFO into the supported projects.
...
+ All pack/unpack logic is made by the cpack and upack modules.
+ The DAC FIFO is integrated between the TX DMA and cpack.
+ All the top files are updated, all the projects compiled successfully.
2015-05-11 12:20:50 +03:00
Adrian Costina
00335a2af2
Makefile: Fix ZC706 Makefiles with propper address for the mig file
2015-05-11 10:25:07 +03:00
Adrian Costina
91279253ef
Makefiles: Added mig project file as a dependency for Microblaze based projects. Also updated usdrx1 a5gt Makefile
2015-05-08 15:31:40 +03:00
Adrian Costina
949abcdc8f
Makefile: Updated makefiles so that the project recipe does not depend on lib
2015-05-06 14:58:29 +03:00
Adrian Costina
e332fa01c8
ad6676evb, daq2, fmcadc2, fmcjesdadc1, usdrx1: Updated jesd reset connection
2015-04-30 12:11:46 +03:00
Adrian Costina
a61a195e3f
Makefiles: Updated makefiles to add the new constraints as dependecies
2015-04-23 11:16:39 +03:00
Adrian Costina
dc2b37bd0c
Makefile: Added top level Makefile. Modified behavior of clean and clean-all
...
Clean ran for a project will clean only the project files.
Clean-all ran for a project will clean also the library files on which the project depends.
The clean commands will only remove specific files and directories.
The top Makefile allows several options(per suggestion from jameyhicks):
make fmcomms1.zed will run "make all" in projects/fmcomms1/zed/
make clean will run "make clean" for all the projects
make clean-all will run "make clean" for all the projects and libraries
make lib will run "make all" for the library files
2015-04-17 17:22:38 +03:00
Adrian Costina
780455d68c
Makefile: Updated makefiles. Added makefiles for altera
2015-04-09 17:57:06 +03:00
Rejeesh Kutty
5f8e9a74ea
makefile: updated
2015-04-07 16:32:01 -04:00
Rejeesh Kutty
6d0a2bf64c
axi_adcfifo: added
2015-04-07 16:21:39 -04:00
Rejeesh Kutty
4f7f109056
util_adcfifo: added
2015-04-07 16:08:38 -04:00
Adrian Costina
f79a152958
Makefiles: updated all makefiles adding clean functionality
2015-04-03 11:57:54 +03:00
Rejeesh Kutty
b6d5e21133
makefile: added
2015-04-01 16:29:02 -04:00