9103f6706e
Merge branch 'hdl_2014_r2' of https://github.com/analogdevicesinc/hdl into hdl_2014_r2
2014-12-09 17:38:37 +01:00
138e789fb6
projects/fmcjesdadc1/common/fmcjesdadc1_bd.tcl: Fix interrupts
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sys_concat_intc: don't reset NUM_PORTS to 6
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
2014-12-09 17:38:16 +01:00
0c6cbdd303
fmcadc4: fifo updates
2014-12-09 10:38:51 -05:00
f044ab94e0
fmcadc4: fifo updates
2014-12-09 10:38:50 -05:00
e2a9502e1e
fmcadc4: fifo updates
2014-12-09 10:38:49 -05:00
a2607a8057
fmcadc4: fifo updates
2014-12-09 10:38:47 -05:00
2e4640d5c5
ad9467_kc705: Fix memory segment offset for SEG_axi_ddr_cntrl
2014-12-09 16:17:46 +02:00
a0d5e7862e
ad9467_kc705: Fix typos.
2014-12-09 12:07:49 +02:00
915ee7a268
fmcjesdadc1_kc705: Connect the SPI interrupt to the controller
2014-12-09 11:54:16 +02:00
ee04eb637b
ad9467_kc705: Fix interrupts
2014-12-09 11:54:08 +02:00
abff7097f6
daq3: compilation fixes - latest changes
2014-12-08 14:50:03 -05:00
8a72a6a0dc
daq3: compilation fixes - latest changes
2014-12-08 14:49:52 -05:00
7c3ed75b79
daq3: compilation fixes - latest changes
2014-12-08 14:49:40 -05:00
82b9ebe23d
remove replaced projects
2014-12-08 10:45:12 -05:00
19e4950b72
renamed to match official names
2014-12-08 10:44:15 -05:00
84174460bb
projects/common/kcu105/kcu105_system_bd: Restore axi_ethernet SupportLevel 0
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Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
2014-12-05 14:50:45 +01:00
bb6cc40902
projects/common: KCU105 VC707 update and sync axi_ethernet:6.1 features
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Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
2014-12-05 14:50:45 +01:00
8e4d0a1b60
projects/common: KCU105 VC707 KC705 sync microblaze core defaults
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Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
2014-12-05 14:50:45 +01:00
4c05e8de5d
motor_control: Updated project to Vivado 14.2. Temporary removed XADC
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- fixed constraints
- updated interrupt system
- used ad_iobuf
- The XADC was removed because the XADC IPI generates vaux inputs 0 and 10 even if 0 and 8 are selected
2014-12-05 11:48:00 +02:00
11f41d1dff
zynq_plddr3: Fix PLDDR3's Reset Generator
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Reset generator's external reset signal was active low, but the GT reset is active high, and both the DDR controller and FIFO2S were in reset.
Therefore the external reset active state is changed to active high. This setup in general is made by the tool automatically, in order to do it correctly, need to
set this two property of the reset generator.
2014-12-04 15:42:28 +02:00
324c0528c2
fmcomms6: Better cope with higher sample rates
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There can be a rather high latency between the last byte of a burst has been send and the time the response for the burst is received. Running at high samplerates this can cause the internal DMA store and forward FIFO to fill up and subsequently stall the DMA pipeline and drop samples. To better cope with the situation double the size of the internal FIFO. Also increase the clock of the AXI bus to be able to accommodate a samplerate of 310MHz.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2014-12-04 13:28:37 +01:00
46156b7ceb
fmcomms6: Add DMA overflow signal to ILA
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This is useful for debugging DMA overflows.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2014-12-04 13:28:37 +01:00
56a8a54080
ad9625x2_fmc: Increase the dma fifo data depth
2014-12-03 12:13:08 +02:00
757c213165
ad9625x2_fmc: Integrate the dac spi interface into the SPI interface
2014-12-03 12:06:43 +02:00
805d52346c
fmcomms7: compilation fixes on plddr3
2014-12-02 10:39:01 -05:00
f01d1aae2d
fmcomms7: compilation fixes on plddr3
2014-12-02 10:38:44 -05:00
95e113e1a3
fmcomms6: Connect DMA directly to the HP port
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The axi_dmac supports native AXI3, there is no need to add a interconnect
for protocol conversion between it and the HP port.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2014-12-01 13:45:45 +01:00
45fc7bb7e2
fmcomms6: Set ila type to native
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With version 4.0 ila defaults to the AXI monitor type, so explicitly
configure it for native.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2014-12-01 13:45:45 +01:00
5b68b79dec
ad9467_fmc: Set ila type to native
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With version 4.0 ila defaults to the AXI monitor type, so explicitly
configure it for native.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2014-12-01 13:45:45 +01:00
d5422c2ecc
fmcomms2: Zed, fixed iic multiplexer ad_iobuf connections
2014-11-28 14:17:09 +02:00
d5a1df2fe6
usdrx1_zc706: Update interrupts.
2014-11-27 14:06:13 +02:00
eed1981ede
usdrx1_fmc: Fix GT lane number definition.
2014-11-27 14:05:54 +02:00
a576f7dc98
ad9671_zc706: Update interrupts
2014-11-27 14:05:43 +02:00
0ccc546aeb
ad9671_fmc: Fix GT lane number definition
2014-11-27 14:05:34 +02:00
ee7d427123
ad9671_fmc: Cosmetic changes
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Delete trailing whitespaces.
2014-11-27 14:05:24 +02:00
419d38b9f6
kc705_base: Define sys_addr_mem_seg for dmafifo
2014-11-26 15:38:41 +02:00
6fd2f8c913
daq2_fmc: Update interrupts
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Update interrupts for ZC706 and KC705 carrier.
2014-11-26 15:38:24 +02:00
bfd89dc9c7
daq2_kc705: Fix constraint file
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I/O standard for trig_[p/n] is LVDS_25
2014-11-26 15:38:10 +02:00
630f26442a
daq2_kc705: Instantiate dmafifo module
2014-11-26 15:37:57 +02:00
00c7b23b21
daq2_fmc: Cosmetic changes
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Delete trailing whitespaces, no functional changes.
2014-11-26 15:37:48 +02:00
199e86d715
fmcomms2: Added iic_fmc_intr to the zed top file
2014-11-26 11:47:16 +02:00
03751827cb
fmcomms2: Updated vc707 project
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- updated constraints
- updated interrupts
- used ad_iobuf
- added linear_flash
2014-11-26 11:47:06 +02:00
40c5816bd7
fmcomms2: Updated mitx045 project. Updated constraints. Updated interrupts
2014-11-26 11:46:53 +02:00
626b719ad8
ad6676ebv_vc707: Update the interrupts
2014-11-26 10:56:47 +02:00
322324b891
ad6676evb_vc707: Add support for linear flash
2014-11-26 10:56:36 +02:00
67f82c9e3e
ad6676_fmc: Fix GT lane number definition
2014-11-26 10:56:23 +02:00
81f0e417d4
Add Vivado version check to adi_project_create
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The scripts generating the projects files typically only work correctly with
one specific version of Vivado. If a incorrect version is used the script
may fail at some point with a cryptic error message or may not fail but
create a bitstream that is not working as expected, e.g. unconnected
signals, etc. This patch adds a version check to adi_project_create that
will error out early on stating that the wrong version of Vivado was used
and which is the right version to use.
By default the required version will be the version that is required by the
common scripts. Individual projects can overwrite the required version by
setting the REQUIRED_VIVADO_VERSION variable to the required version or can
bypass the version check completely by setting the IGNORE_VERSION_CHECK
variable to 1.
Callers of the script can also disable the version check by setting the
ADI_IGNORE_VERSION_CHECK environment variable.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2014-11-25 18:35:11 +01:00
2e72a2cc0c
fmcomms1: Updated VC707 project with latest interrupts and linear flash. Fixed constraints and constraint priority
2014-11-25 15:00:00 +02:00
dbc9da8598
fmcomms1: Updated KC705 project with latest interrupts. Fixed constraints and constraint priority
2014-11-25 14:56:22 +02:00
87324d8a14
fmcomms1: Updated AC701 project with latest interrupts. Fixed constraints and constraint priority
2014-11-25 14:54:01 +02:00
b8ab2ff847
fmcomms1: updated common project
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- increased the DMA FIFOs to 64
- added axi slices to the source and destination for DMAs
- for microblaze systems, increade the ad9643 dma data width at destination
- removed sys_fmc_dma_clk and used the sys_200m_clk instead for DMA data transfer
2014-11-25 14:51:42 +02:00
2bd154ad59
xfest14_zed: Update project to 2014.2
2014-11-25 12:53:42 +02:00
a1e67a5912
ad9625x2_fmc: dmafifo address width now is an argument of the process
2014-11-24 19:22:18 +02:00
660424ef99
fmcomms6_fmc: Update interrupts
2014-11-24 18:23:35 +02:00
56aefb62ed
fmcomms6_fmc: Cosmetic changes
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Delete trailing white spaces, and fix alignment.
2014-11-24 18:23:34 +02:00
68ac015825
daq1_fmcl: Fix GT lane number definitions
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Update which fix issues caused by GT lane number parameters change. (commit f8e7796592
2014-11-24 18:23:33 +02:00
0ecfc14e95
daq1_fmc: Update interrupts.
2014-11-24 18:23:32 +02:00
9b104f1657
daq1_fmc: Get rid of the concat module inside the block design.
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xl_concat just causing troubles, no need to use it, if not justified.
2014-11-24 18:23:30 +02:00
64b4d0177e
ad9467_zed: Using ad_iobuf module for IO buffer instantiations on top
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No functional changes, we just try to keep consistency.
2014-11-24 18:23:29 +02:00
83c2eefea2
ad9467_fmc: Update interrupts
2014-11-24 18:23:28 +02:00
114406335d
ad9467_fmc: Connect dma controller directly to the HP port
2014-11-24 18:23:27 +02:00
67065a3130
ad9680_eval: removed
2014-11-24 11:04:34 -05:00
76fb5d3da9
ad9625_vc707: dmafifo address width now is an argument of the process
2014-11-24 16:52:10 +02:00
1834cf6d38
adi_prcfg_project: Update the PR design flow
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Optimization directive kept on default in the implementation flow.
2014-11-21 19:26:33 +02:00
83d79a6acf
fmcomms2_pr: Update system_project script for mitx
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Bist logic is using the pnmon module for PRBS checking.
2014-11-21 19:23:12 +02:00
6517a94929
fmcomms2_pr: Update interrupts and iobuf
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No functional changes, update to the new interrupt path, and change the
iobuf instantiation in order to keep consistency.
2014-11-21 19:22:03 +02:00
65588f1b67
fmcomms2_pr: Cosmetic changes of mitx system top.
2014-11-21 19:20:30 +02:00
84f8377beb
fmcjedadc1_vc707: Add support for linear flash interface
2014-11-21 19:19:21 +02:00
e8546b9c3b
fmcjesdadc1: Update interrupts for KC705 and VC707
2014-11-21 19:18:30 +02:00
b0f571ce0c
fmcjesdadc1: Fix parameter lane number for GT core
2014-11-21 19:17:29 +02:00
c0f4d7e2b5
mitx045_common: Definition file patch
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In 2014.2 tool version, the way how a definition file needs to be applied is different
The command "apply_bd_automation" should be used, instead setting property PCW_IMPORT_BOARD_PRESET
In non-project mode (PR design flow), after creating the static design the type of the board is set.
NOTE: the definition file for mitx must be installed accordingly in order to get this work
See link: http://zedboard.org/support/documentation/2056
2014-11-21 19:14:37 +02:00
5e08e18022
ad9434_fmc: Update interrupts
2014-11-21 19:06:48 +02:00
db004641d3
kcu105: dmafifo address width change
2014-11-20 09:28:03 -05:00
cdd1408d3c
dmafifo: parameterized address width
2014-11-20 09:28:02 -05:00
2912372d6e
ad9625_fmc: Add support for AD-JESDCLOCK1-EBZ
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Connect the SPARE_CLOCK_DUT pin to GPIO, this will be used to reset the AD9527.
The SPI interface for the clock chip is already integrated into the design.
2014-11-18 14:11:51 +02:00
bbf1f0c156
adi_project: Add board definition for mitx045
2014-11-18 10:05:57 +02:00
e3378cd6cb
mitx045_board_definition: revert old board definition file
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Revert commit 4f6aa159b8
2014-11-18 10:05:55 +02:00
6e194dbcc0
adv7511_ac701: Fix project source files definition
2014-11-18 10:05:54 +02:00
766589637e
prcfg_zc706: Update data width and project script
2014-11-18 10:05:53 +02:00
5c7e8eb926
prcfg_setup: Fix data width, delete invalid ILA configurations
2014-11-18 10:05:51 +02:00
bd57c2246e
prcfg: Increase the PR portion area in order to increase the DSP resource.
2014-11-18 10:05:49 +02:00
344f1bb539
adv7511_kc705: Fix project source definition
2014-11-18 10:05:48 +02:00
01b3495a81
fmcomms1: Updated ZC706 project to be compatible with util_wfifo and increased system_constr.xdc priority
2014-11-17 18:33:21 +02:00
20a3f322e7
fmcomms1: Updated zc702 project
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- fixed timing constraints, increased system_constr.xdc priority
- used ad_iobuf
- updated interrupt system to latest implementation
2014-11-17 18:32:12 +02:00
adcd16d033
fmcomms1: Updated zed project
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- fixed timing constraints
- used ad_iobuf
- updated interrupt system to latest implementation
2014-11-17 18:31:24 +02:00
5d1a0a14bf
ad9625x2_fmc: dma fifo changes
2014-11-14 16:00:32 -05:00
2eb80715e3
ad9625_fmc: dma fifo changes
2014-11-13 14:13:00 -05:00
eaacd4d49a
adi_project.tcl: Fix message severity (working solution)
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Need to define the default/initial severity too.
2014-11-13 18:55:43 +02:00
4bcf338e9b
adi_project.tcl : Fix message severity
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When message severity is set to 'error', need to do it quiet, other way the tool will stop after synthesis, complaining for previous errors.
2014-11-13 16:33:47 +02:00
5baa015246
kc705_base: Delete timing constraints
2014-11-13 16:30:37 +02:00
3915f7d5f4
daq2: kcu105 dma-fifo changes
2014-11-12 15:25:13 -05:00
d79e95b774
daq2: dma-fifo changes
2014-11-12 15:24:54 -05:00
074662a622
dmafifo: common interface with fifo2s
2014-11-12 15:24:31 -05:00
855919ee8e
plddr3: internal buswidth/clock conversion
2014-11-12 14:43:50 -05:00
dbf5acde76
plddr3: internal buswidth/clock conversion
2014-11-12 14:43:49 -05:00
c6af2696b3
plddr3: internal buswidth/clock conversion
2014-11-12 14:43:48 -05:00
ce92d49565
adv7511: Updated VC707 project to include linear flash
2014-11-12 11:46:01 +02:00
897f5e219d
ad9625_zc706: Update GT configuration
2014-11-11 19:25:30 +02:00
776a396141
adi_project.tcl: Add new message severity definition
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Set "Parameter does not exist!" message severity to error.
2014-11-11 19:20:40 +02:00
8147fa0eb6
fmcomms7: asymmetric no of lanes
2014-11-11 08:54:27 -05:00
Michael Hennerich
Rejeesh Kutty
Istvan Csomortani
Adrian Costina
Lars-Peter Clausen