The ADC DMA will never underflow and unsurprisingly the adc_dunf signal is
never used anywhere. It is very unlikely it will ever be used, so remove
it.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Most of the cores are fully covered by the generic constraint files. When
the constraints where moved from the core specific to the generic
constraint files some empty core constraints files where left around. These
don't do anything, so remove them.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
The DC filter implementation in library/common/dc_filter.v is Xilinx
specific as it uses the Xilinx DSP48 hard-macro. There is a matching Altera
specific implementation in library/altera/common/dc_filter.v.
Move the Xilinx specific implementation from the generic common folder to
the Xilinx specific common folder in library/xilinx/common/ since that is
where all other Xilinx specific common modules reside.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Lars-Peter Clausen
Adrian Costina
Rejeesh Kutty
Istvan Csomortani
Istvan Csomortani