zcy
/
pluto_hdl_adi
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity
6,372 Commits
1 Branch
0 Tags
23 MiB
Commit Graph

3 Commits (27bb69b44c02ccf907bdc83749845cf11fe87940)

Author SHA1 Message Date
Iulia Moldovan 28c06d505f Add/edit copyright and license for .v, .sv files 
Signed-off-by: Iulia Moldovan <Iulia.Moldovan@analog.com>
 2023-07-11 15:17:41 +03:00
Bogdan Luncan 294b681196 ad9081: Proper reset sequence for versal transceivers 
- Removes the reset_tx_pll_and_datapath_in reset
- Connects gtreset_in to make use of the master reset found inside
the Transceiver Bridge IP
- Connects the necessary signals for the master reset between the
Transceiver Wizard and Transceiver Bridge

ad9209/vck190/system_top: Connect versal transceiver reset

Signed-off-by: Bogdan Luncan <bogdan.luncan@analog.com>
 2023-05-16 12:13:55 +03:00
Bogdan Luncan b03fac4b37 ad9209: Initial vck190 design 
Signed-off-by: Bogdan Luncan <bogdan.luncan@analog.com>
 2023-05-10 12:59:58 +03:00