Istvan Csomortani
2912372d6e
ad9625_fmc: Add support for AD-JESDCLOCK1-EBZ
...
Connect the SPARE_CLOCK_DUT pin to GPIO, this will be used to reset the AD9527.
The SPI interface for the clock chip is already integrated into the design.
2014-11-18 14:11:51 +02:00
Rejeesh Kutty
2eb80715e3
ad9625_fmc: dma fifo changes
2014-11-13 14:13:00 -05:00
Rejeesh Kutty
2e01ad2eec
ad9625_fmc/zc706: ps7 interrupt updates
2014-10-29 12:13:44 -04:00
Rejeesh Kutty
d4a21d9775
ad9625_fmc: constraints fix
2014-10-20 10:00:39 -04:00
Rejeesh Kutty
7f8270d74b
ad9625_fmc: generic dma fifo for zynq and non-zynq boards
2014-10-17 14:38:16 -04:00
Rejeesh Kutty
0b30f98640
ad9625_fmc/zc706: remove top level constraints
2014-10-17 14:38:15 -04:00
Rejeesh Kutty
c375b5b26e
daq3: vivado build
2014-10-06 10:34:02 -04:00
Istvan Csomortani
4da8100fe5
ad9625_plddr: Delete trailing whitespaces.
2014-07-23 19:31:07 +03:00
Rejeesh Kutty
b434fe6dd5
fmcomms5: register map changes
2014-07-08 16:57:43 -04:00
Rejeesh Kutty
f2bf5ced04
ad9625: register map updates
2014-07-03 14:30:03 -04:00
Rejeesh Kutty
e38813fa9f
fifo- monitor status signals
2014-06-25 12:15:13 -04:00
Rejeesh Kutty
2d27f88588
ad9625_fmc, ad9625x2_fmc: initial checkin
2014-06-09 16:40:48 -04:00