3 Commits (20a223be996f5b01f1dcadd21e5b0e7adf33a4d0)

Author	SHA1	Message	Date
Adrian Costina	20a223be99	util_var_fifo: Move BRAM outside of the core so that it can be generated using Xilinx IP	2017-04-18 12:17:40 +02:00
Istvan Csomortani	1c23cf4621	all: Update verilog files to verilog-2001	2017-04-13 11:59:55 +03:00
Adrian Costina	7387df9d13	util_var_fifo: Initial commit	2017-01-31 16:26:45 +02:00