Commit Graph

5 Commits (1cac2d82e1eab7cf8688d08a0d711a986e69150f)

Author SHA1 Message Date
Bogdan Luncan e1af7837da ad9081: Parameters and header update
Signed-off-by: Bogdan Luncan <bogdan.luncan@analog.com>
2023-05-10 12:59:58 +03:00
Bogdan Luncan 72313df81f Updated the makefiles to build the projects in subdirectories based on the build parameters.
Running 'make' will build the default project directly in the project folder (like it did before)
Running 'make RX_LANE_RATE=15 TX_LANE_RATE=15' will build the project inside the 'RXRATE15_TXRATE15' subdirectory.
Running 'make CFG=cfg/test_config.txt" will use the variables found inside the configuration file and build the project inside the 'test_config' subdirectory.
Running 'make clean' will clean the default project only.
Running 'make CFG=cfg/test_config.txt clean' will clean the 'testconfig' build.
Running 'make clean-all' will delete all the built configurations and libraries.

Note that the 'JESD' and 'LANE' words from the parameter names are stripped.

Signed-off-by: Bogdan Luncan <bogdan.luncan@analog.com>
2022-11-14 09:38:42 +02:00
Laszlo Nagy fa168fafe0 ad9081_fmca_ebz:vcu128: Disable offload bypass
The internal bypass FIFO has poor timing performance,
when using HBM data can be passed always through the external memory
without storage length constraints, so no need for the internal bypass FIFO.
2022-04-28 14:31:32 +03:00
Laszlo Nagy c57015f80e ad9081_fmca_ebz/vcu128: Use HBM for data offload cores 2022-04-28 14:31:32 +03:00
Laszlo Nagy e76f287e73 ad9081_fmca_ebz:vcu128: Initial version
* 4Txs / 4Rxs per MxFE
 * Tx I/Q Rate: 250 MSPS
 * Rx I/Q Rate: 250 MSPS
 * DAC JESD204B: Mode 9, L=4, M=8, N=N'=16
 * ADC JESD204B: Mode 10, L=4, M=8, N=N'=16
 * DAC-Side JESD204B Lane Rate: 10Gbps
 * ADC-Side JESD204B Lane Rate: 10Gbps
2021-11-19 18:08:16 +02:00