Rejeesh Kutty
|
8fedb5b41c
|
fifo2s: qualify last with valid
|
2015-01-15 09:34:43 -05:00 |
|
Rejeesh Kutty
|
f4774d6f98
|
fifo2s: false path typo on source signals
|
2014-12-19 13:00:13 +02:00 |
Istvan Csomortani
|
c4152627f0
|
plddr3: Sync adc_wcnt_int to adc_wr and fix adc_dwr pulse width
The adc_wcnt_int must be synchronized to adc_wr. The adc_dwr signal pulse width was to long,
it needs to be just one adc_clk cycle.
|
2014-12-09 13:59:19 +02:00 |
|
Rejeesh Kutty
|
41ffc66c26
|
fifo2s: removed m interface
|
2014-11-13 15:00:03 -05:00 |
|
Rejeesh Kutty
|
925e966eb6
|
axi_fifo2s: fifo full replaced with ready
|
2014-11-12 14:43:47 -05:00 |
|
Rejeesh Kutty
|
5fc4f1b000
|
axi_fifo2s: buswidth fix
|
2014-11-12 14:43:46 -05:00 |
|
Rejeesh Kutty
|
d204a7c2b7
|
axi_fifo2s: include bus width/clock transfer
|
2014-11-12 14:43:44 -05:00 |
|
Rejeesh Kutty
|
e7cec7171e
|
axi_fifo2s: include bus width/clock transfer
|
2014-11-12 14:43:43 -05:00 |
|
Rejeesh Kutty
|
4381f20a6a
|
axi_fifo2s: include bus width/clock transfer
|
2014-11-12 14:43:42 -05:00 |
|
Rejeesh Kutty
|
9f2dbad539
|
axi_fifo2s: include bus width/clock transfer
|
2014-11-12 14:43:41 -05:00 |
|
Rejeesh Kutty
|
e683b5868e
|
axi_fifo2s: include bus width/clock transfer
|
2014-11-12 14:43:40 -05:00 |
|
Rejeesh Kutty
|
81b4cd532d
|
axi_fifo2s: include bus width/clock transfer
|
2014-11-12 14:43:38 -05:00 |
|
Rejeesh Kutty
|
888ab888d2
|
axi_fifo2s: include bus width/clock transfer
|
2014-11-12 14:43:37 -05:00 |
|
Rejeesh Kutty
|
206b96d55a
|
ip: constraint changes
|
2014-10-15 14:50:58 -04:00 |
|
Rejeesh Kutty
|
51a15a28b7
|
axi_fifo2s: added constraints
|
2014-10-15 14:50:53 -04:00 |
Lars-Peter Clausen
|
50faf0c53a
|
Remove executable flags from non-exectuable files
|
2014-09-09 15:05:06 +02:00 |
|
Istvan Csomortani
|
4da8100fe5
|
ad9625_plddr: Delete trailing whitespaces.
|
2014-07-23 19:31:07 +03:00 |
|
Rejeesh Kutty
|
2955b9db78
|
fifo2s: flush if no request, c5soc: 14.0
|
2014-07-15 16:25:33 -04:00 |
|
Rejeesh Kutty
|
a9992f02b0
|
fifo2s: bug fixes- on 64mhz dma clock
|
2014-07-08 16:57:44 -04:00 |
|
Rejeesh Kutty
|
b434fe6dd5
|
fmcomms5: register map changes
|
2014-07-08 16:57:43 -04:00 |
|
Rejeesh Kutty
|
e38813fa9f
|
fifo- monitor status signals
|
2014-06-25 12:15:13 -04:00 |
|
Rejeesh Kutty
|
4877df9bec
|
axi_fifo2s: make read dead slow
|
2014-06-25 09:20:57 -04:00 |
|
rkutty
|
5189d200e7
|
axi_fifo2s: linux fix on interfaces
|
2014-06-12 15:30:13 -04:00 |
|
Rejeesh Kutty
|
f73819f4d4
|
zc706: pl ddr3 initial checkin
|
2014-05-13 16:19:53 -04:00 |