012b095006
daq3: Updated common design to 2015.4
2016-03-17 11:44:27 +02:00
977d9d0624
Merge branch 'hdl_2015_r2' into dev
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Conflicts:
projects/daq1/common/daq1_spi.v
2016-03-02 13:52:15 +02:00
40fb68dfd5
ad9265, ad9434, ad9467, daq1, daq2, daq3, fmcadc2, fmcadc4, fmcadc5, fmcjesdadc1, fmcomms6, fmcomms7, usdrx1: updated common spi module so that spi streaming is possible
2016-03-02 13:39:37 +02:00
f7e490c2b3
hdlmake.pl updates
2016-02-26 13:46:11 -05:00
83fd4a53a7
daq3/kcu105: updates
2015-12-14 09:29:48 -05:00
07316a905e
daq3/a10gx: sysref is lvds
2015-12-14 09:29:10 -05:00
6a9d1c431a
daq3/a10gx: updated to a10gx/quartus
2015-12-11 12:49:25 -05:00
dc84a9ad82
daq3/a10gx: updates
2015-12-10 16:06:14 -05:00
d944198212
daq3/a10gx: board updates
2015-12-10 09:45:20 -05:00
1a38ea205d
daq3/a10gx: copy
2015-12-10 09:42:56 -05:00
614babc18e
daq3/kcu105: copy
2015-12-10 09:41:47 -05:00
b0fef1122e
daq3/a10gx: copy
2015-12-10 09:41:37 -05:00
159f6c1216
Makefiles: Updated Makefiles
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- for altera projects, taken into consideration of the new location for common qsys files
- for fmcomms5, added wfifo dependency
- for daq3, added mfifo dependency
2015-11-27 12:39:42 +02:00
a6f44949d6
daq3: updates
2015-11-13 13:17:11 -05:00
9d2b8809df
Makefiles: Updated Makefiles
2015-10-23 10:44:27 +03:00
b93af3c21e
daq3- bd updates
2015-09-30 10:11:49 -04:00
6c7316fbd0
daq3: Drop explicit axi_dmac clock synchronicity configuration
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The axi_dmac core is now capable of detecting whether its different parts
run in different clock domains or not. No need to configure it manually any
more.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2015-09-18 15:27:56 +02:00
d52308f074
axi_dmac: Change parameter name 2D_TRANSFER
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Parameter name can't start with numbers, 2D_TRANSFER was changed to DMA_2D_TRANSFER
2015-08-20 10:14:22 +03:00
57cfb7cfb1
hdl/library: Update the IP parameters
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The following IP parameters were renamed:
PCORE_ID --> ID
PCORE_DEVTYPE --> DEVICE_TYPE
PCORE_IODELAY_GROUP --> IO_DELAY_GROUP
CH_DW --> CHANNEL_DATA_WIDTH
CH_CNT --> NUM_OF_CHANNELS
PCORE_BUFTYPE --> DEVICE_TYPE
PCORE_ADC_DP_DISABLE --> ADC_DATAPATH_DISABLE
CHID --> CHANNEL_ID
PCORE_DEVICE_TYPE --> DEVICE_TYPE
PCORE_MMCM_BUFIO_N --> MMCM_BUFIO_N
PCORE_SERDES_DDR_N --> SERDES_DDR_N
PCORE_DAC_DP_DISABLE --> DAC_DATAPATH_DISABLE
DP_DISABLE --> DATAPATH_DISABLE
PCORE_DAC_IODELAY_ENABLE --> DAC_IODELAY_ENABLE
C_BIG_ENDIAN --> BIG_ENDIAN
C_M_DATA_WIDTH --> MASTER_DATA_WIDTH
C_S_DATA_WIDTH --> SLAVE_DATA_WIDTH
NUM_CHANNELS --> NUM_OF_CHANNELS
CHANNELS --> NUM_OF_CHANNELS
PCORE_4L_2L_N -->QUAD_OR_DUAL_N
C_ADDRESS_WIDTH --> ADDRESS_WIDTH
C_DATA_WIDTH --> DATA_WIDTH
C_CLKS_ASYNC --> CLKS_ASYNC
PCORE_QUAD_DUAL_N --> QUAD_DUAL_N
NUM_CS --> NUM_OF_CS
PCORE_DAC_CHANNEL_ID --> DAC_CHANNEL_ID
PCORE_ADC_CHANNEL_ID --> ADC_CHANNEL_ID
PCORE_CLK0_DIV --> CLK0_DIV
PCORE_CLK1_DIV --> CLK1_DIV
PCORE_CLKIN_PERIOD --> CLKIN_PERIOD
PCORE_VCO_DIV --> VCO_DIV
PCORE_Cr_Cb_N --> CR_CB_N
PCORE_VCO_MUL --> VCO_MUL
PCORE_EMBEDDED_SYNC --> EMBEDDED_SYNC
PCORE_AXI_ID_WIDTH --> AXI_ID_WIDTH
PCORE_ADDR_WIDTH --> ADDRESS_WIDTH
DADATA_WIDTH --> DATA_WIDTH
NUM_OF_NUM_OF_CHANNEL --> NUM_OF_CHANNELS
DEBOUNCER_LEN --> DEBOUNCER_LENGTH
ADDR_WIDTH --> ADDRESS_WIDTH
C_S_AXIS_REGISTERED --> S_AXIS_REGISTERED
Cr_Cb_N --> CR_CB_N
ADDATA_WIDTH --> ADC_DATA_WIDTH
BUFTYPE --> DEVICE_TYPE
NUM_BITS --> NUM_OF_BITS
WIDTH_A --> A_DATA_WIDTH
WIDTH_B --> B_DATA_WIDTH
CH_OCNT --> NUM_OF_CHANNELS_O
M_CNT --> NUM_OF_CHANNELS_M
P_CNT --> NUM_OF_CHANNELS_P
CH_ICNT --> NUM_OF_CHANNELS_I
CH_MCNT --> NUM_OF_CHANNELS_M
4L_2L_N --> QUAD_OR_DUAL_N
SPI_CLK_ASYNC --> ASYNC_SPI_CLK
MMCM_BUFIO_N --> MMCM_OR_BUFIO_N
SERDES_DDR_N --> SERDES_OR_DDR_N
CLK_ASYNC --> ASYNC_CLK
CLKS_ASYNC --> ASYNC_CLK
SERDES --> SERDES_OR_DDR_N
GTH_GTX_N --> GTH_OR_GTX_N
IF_TYPE --> DDR_OR_SDR_N
PARALLEL_WIDTH --> DATA_WIDTH
ADD_SUB --> ADD_OR_SUB_N
A_WIDTH --> A_DATA_WIDTH
CONST_VALUE --> B_DATA_VALUE
IO_BASEADDR --> BASE_ADDRESS
IO_WIDTH --> DATA_WIDTH
QUAD_DUAL_N --> QUAD_OR_DUAL_N
AXI_ADDRLIMIT --> AXI_ADDRESS_LIMIT
ADDRESS_A_DATA_WIDTH --> A_ADDRESS_WIDTH
ADDRESS_B_DATA_WIDTH --> B_ADDRESS_WIDTH
MODE_OF_ENABLE --> CONTROL_TYPE
CONTROL_TYPE --> LEVEL_OR_PULSE_N
IQSEL --> Q_OR_I_N
MMCM --> MMCM_OR_BUFR_N
2015-08-19 14:11:47 +03:00
a7da779b94
Makefile: Updated Makefiles
2015-07-16 18:19:42 +03:00
6c0ad6ede8
daq3: bsplit/ccat -- removed
2015-07-15 13:05:53 -04:00
6862655b0d
Add .gitattributes file
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Add .gitattributes file which sets up the eol encoding handling. This will
make sure that we get a uniform eol encoding across different operating
systems.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2015-06-26 11:07:10 +02:00
71b5004b25
projects- drp moved to up-clock domain
2015-06-01 14:57:59 -04:00
a6cae6b477
iobuf: do is a system verilog keyword
2015-05-21 14:06:17 -04:00
6b9906b22b
Refresh Makefiles
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Re-generate the Makefiles after a small update to the generation script:
- Entries are sorted alphabetically
- Empty dependency lines are skipped
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2015-05-21 14:21:54 +02:00
c19749361d
Makefiles: Updated makefiles to have as a result the programming file instead of the project file.
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Also fixed altera projects dependencies
2015-05-18 17:22:46 +03:00
00335a2af2
Makefile: Fix ZC706 Makefiles with propper address for the mig file
2015-05-11 10:25:07 +03:00
91279253ef
Makefiles: Added mig project file as a dependency for Microblaze based projects. Also updated usdrx1 a5gt Makefile
2015-05-08 15:31:40 +03:00
949abcdc8f
Makefile: Updated makefiles so that the project recipe does not depend on lib
2015-05-06 14:58:29 +03:00
dc2b37bd0c
Makefile: Added top level Makefile. Modified behavior of clean and clean-all
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Clean ran for a project will clean only the project files.
Clean-all ran for a project will clean also the library files on which the project depends.
The clean commands will only remove specific files and directories.
The top Makefile allows several options(per suggestion from jameyhicks):
make fmcomms1.zed will run "make all" in projects/fmcomms1/zed/
make clean will run "make clean" for all the projects
make clean-all will run "make clean" for all the projects and libraries
make lib will run "make all" for the library files
2015-04-17 17:22:38 +03:00
780455d68c
Makefile: Updated makefiles. Added makefiles for altera
2015-04-09 17:57:06 +03:00
5f8e9a74ea
makefile: updated
2015-04-07 16:32:01 -04:00
6d0a2bf64c
axi_adcfifo: added
2015-04-07 16:21:39 -04:00
f79a152958
Makefiles: updated all makefiles adding clean functionality
2015-04-03 11:57:54 +03:00
12e9ab7bdd
makefile: added
2015-04-01 16:29:05 -04:00
4e3e26a8dd
makefile: added
2015-04-01 16:29:03 -04:00
275ce42bc9
daq3: 2014.4 updates
2015-03-19 12:45:55 -04:00
caa0e27bd6
daq3: 2014.4 updates
2015-03-19 12:45:54 -04:00
423b436601
daq3: 2014.4 updates
2015-03-19 12:45:52 -04:00
0c94ea8d2b
daq3: 2014.4 updates
2015-03-19 12:45:51 -04:00
2fa475cca2
daq3: 2014.4 updates
2015-03-19 12:45:50 -04:00
e81327b794
daq3_zc706: Add constraint file for PLDDR
2014-12-18 10:08:33 +02:00
8121d11993
daq3_zc706: Connect PLDDR rst to external push button
2014-12-18 10:07:52 +02:00
090aed508e
daq3_zc706: Delete trailing spaces from system_top
2014-12-18 10:06:29 +02:00
1b4a4bc06e
daq3: compilation fixes - latest changes
2014-12-08 14:51:52 -05:00
c0d588ba8c
daq3: compilation fixes - latest changes
2014-12-08 14:51:52 -05:00
26d72d306e
daq3: compilation fixes - latest changes
2014-12-08 14:51:51 -05:00
cc265b6b9c
daq2/daq3/ad9625_fmc: Connect ADC DMA xfer_req signal
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For proper operation the xfer_req signal needs to be connected from the ADC DMA to the DDR FIFO.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2014-10-29 18:15:54 +01:00
17675863e0
all_projects: Fix the interrupt connections to preserve IRQ layout
2014-10-22 11:48:08 +03:00
2600b1f359
daq3: tx interleave and dma fifo axi streaming
2014-10-15 14:51:04 -04:00
6d76e0b768
zc706: remove top level constraints
2014-10-15 14:51:02 -04:00
c375b5b26e
daq3: vivado build
2014-10-06 10:34:02 -04:00
525373fc04
daq3: daq2 copy
2014-10-06 10:34:00 -04:00
AndreiGrozav
Adrian Costina
Rejeesh Kutty
Lars-Peter Clausen
Istvan Csomortani