18a506b3ca
up_axi: Wait for the transaction to fully finish before releasing up_axi_access
...
Wait for the master to accept the response for the current transaction
before we allow a new transaction to start.
This fixes problems in case the master is not ready to accept the response
when we make it available.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2014-09-10 13:03:52 +02:00
50faf0c53a
Remove executable flags from non-exectuable files
2014-09-09 15:05:06 +02:00
a773cc4992
usdrx1: updated project
...
ad_jesd_align wasa updated to be able to work with frames that have more than 4 octets per frame
2014-09-01 15:18:39 +03:00
2b15c7313e
ad_dcfilter: Fix filter loopback
2014-08-12 14:42:10 +03:00
701dc96016
up_dac_channel: make iq cor coeff(s) tc
2014-07-24 10:10:24 -04:00
db1c931736
ad9625_plddr: PL DDR3 fixes
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- Modified the axi slave interface handler
- Increased the rfifo_mem input depth to prevent overflow
2014-07-23 19:34:44 +03:00
2955b9db78
fifo2s: flush if no request, c5soc: 14.0
2014-07-15 16:25:33 -04:00
e7d5d79e42
daq2/kcu105: gth up and running - as it is commit
2014-07-10 10:56:37 -04:00
a9992f02b0
fifo2s: bug fixes- on 64mhz dma clock
2014-07-08 16:57:44 -04:00
a388ccab0a
fmcomms2/c5soc: initial checkin
2014-07-02 14:56:00 -04:00
60dd14bcdb
a5soc: removed jtag master control
2014-07-01 12:27:37 -04:00
b6052773b7
added adc/dac gpio registers
2014-06-27 14:45:58 -04:00
6b3312bbf9
library: register map changes and for mathworks
2014-06-24 14:24:22 -04:00
d4be46cc17
library: register map changes and for mathworks
2014-06-24 14:23:56 -04:00
cf56a568c6
kcu105: GTH updates
2014-06-05 14:27:38 -04:00
842cd98b61
ad9361: adc loopback option
2014-05-27 12:15:02 -04:00
0cd43e34f5
dds: zero scale fix
2014-05-21 11:54:49 -04:00
3aed3ba71c
axi_ad9361: fmcomms5 changes
2014-05-19 12:41:12 -04:00
f3f8374c75
ad9671: 2lane version
2014-05-08 18:33:26 -04:00
5f2fb45b24
library: ported hdmi tx to altera
2014-05-02 12:07:47 -04:00
503096de18
gt: change userready on drp clock
2014-04-17 16:09:55 -04:00
c73390b6c9
axi_ad9361: Intermediary check in for altera porting
...
This is work in progress. It will not work as it is
2014-04-11 17:40:34 +03:00
799d2384d8
up_xfer_cntrl: Remove extra semicolon
...
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2014-04-10 13:50:39 +02:00
f8f2684b7e
up_gt: eyescan delay bug fix
2014-04-02 16:45:41 -04:00
2472d61daf
ad_gt_es: status asserted early for latency
2014-04-01 15:06:51 -04:00
724bd70a06
altera additions and replacements
2014-04-01 11:18:10 -04:00
25f416e46f
dds output is reset if disabled
2014-03-31 10:01:49 -04:00
ad491e92ab
changed pcore version and made it local (top shouldn't override)
2014-03-14 12:02:16 -04:00
fd14607da5
mult instances: consistent naming style
2014-03-12 15:42:47 -04:00
7fc5b8ecd9
common: use dsp slice for multiply modules
2014-03-12 15:35:21 -04:00
0817973cc0
library: removed xilinx dc filter and dds
2014-03-10 14:52:48 -04:00
bb0431d3e8
library: dds and dcfilter changes, added fifo wrappers
2014-03-10 11:11:50 -04:00
d6256e9e29
library: dds and dcfilter changes, added fifo wrappers
2014-03-10 11:11:16 -04:00
23a62a92b2
up_adc_common: dma bus width is 0x8 (constant)
2014-03-06 19:22:19 -05:00
f7c9368abc
initial checkin
2014-02-28 14:26:22 -05:00
Lars-Peter Clausen
Adrian Costina
Istvan Csomortani
Rejeesh Kutty
U-ANALOG\ACostina