Rejeesh Kutty
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6346017763
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c5soc: changed to alt_lvds - 250M is too high for cyclone v
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2014-07-24 20:51:40 -04:00 |
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Rejeesh Kutty
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c0e31aa6c2
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daq2: latest hardware
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2014-07-21 09:06:57 -04:00 |
Adrian Costina
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39ac29bb01
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AD9361: Altera, modified address width so that all registers are accessible
Modified qsys project with the new address span
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2014-07-08 10:41:51 +03:00 |
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Rejeesh Kutty
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a388ccab0a
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fmcomms2/c5soc: initial checkin
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2014-07-02 14:56:00 -04:00 |
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Rejeesh Kutty
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10a7804e14
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ad9361: altera wrapper updates
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2014-06-25 15:26:06 -04:00 |
U-ANALOG\ACostina
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c73390b6c9
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axi_ad9361: Intermediary check in for altera porting
This is work in progress. It will not work as it is
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2014-04-11 17:40:34 +03:00 |