Adrian Costina
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c52327d0c6
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common,adv7511: Added mitx045 platform.
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2014-06-02 11:08:03 +03:00 |
Rejeesh Kutty
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877b81a373
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ad9625/vc707: working version
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2014-05-30 15:07:23 -04:00 |
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Rejeesh Kutty
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c789dce77e
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ad9625/zc706: added pl ddr3 fifo changes
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2014-05-29 12:59:29 -04:00 |
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Rejeesh Kutty
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5b5bca400f
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ad9361: added adc loopback
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2014-05-27 14:47:59 -04:00 |
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Rejeesh Kutty
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842cd98b61
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ad9361: adc loopback option
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2014-05-27 12:15:02 -04:00 |
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Rejeesh Kutty
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56ddce1e8c
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dmac: create fifo interface to avoid being treated as axi control stream
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2014-05-27 10:25:14 -04:00 |
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Rejeesh Kutty
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0cd43e34f5
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dds: zero scale fix
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2014-05-21 11:54:49 -04:00 |
Istvan Csomortani
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1d53d79e25
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fmcomms2/common: Fix ad9361's interface
Loopback the l_clk to clk. l_clk is the device sampling clock, clk is used to
synchronize the cores in case of a multiple device configuration.
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2014-05-21 10:09:54 +03:00 |
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Istvan Csomortani
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25e4520726
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fmcomms2/common: Delet trailing white spaces
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2014-05-21 09:47:37 +03:00 |
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Rejeesh Kutty
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bab90a19c2
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fmcomms5/zc702: removed unused ila cores
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2014-05-20 14:42:48 -04:00 |
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Rejeesh Kutty
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7e6b4ea9d0
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fmcomms5: ignore only common clock to external clocks
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2014-05-19 20:38:41 -04:00 |
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Rejeesh Kutty
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916afd460f
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axi_jesd_gt: synchronization support
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2014-05-19 14:17:31 -04:00 |
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Rejeesh Kutty
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9a36075324
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moved fmcomms5
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2014-05-19 13:49:49 -04:00 |
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Rejeesh Kutty
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3aed3ba71c
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axi_ad9361: fmcomms5 changes
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2014-05-19 12:41:12 -04:00 |
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Rejeesh Kutty
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f73819f4d4
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zc706: pl ddr3 initial checkin
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2014-05-13 16:19:53 -04:00 |
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Rejeesh Kutty
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a007add714
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iqcorrection: missing input signals fix
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2014-05-09 11:17:50 -04:00 |
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Rejeesh Kutty
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f3f8374c75
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ad9671: 2lane version
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2014-05-08 18:33:26 -04:00 |
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Istvan Csomortani
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c5b3dd3643
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vc707 base : tcl update
- Added missing address space
- Connect the sys_audio_clkgen/reset
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2014-05-08 12:30:25 +03:00 |
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Rejeesh Kutty
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3ac1da178e
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kcu105: sane except for ddr4/ethernet
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2014-05-06 15:39:05 -04:00 |
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Rejeesh Kutty
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51c0ee1e20
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ml605: tcl updates
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2014-05-06 09:29:21 -04:00 |
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Rejeesh Kutty
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e7cbaca216
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ml605: initial checkin
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2014-05-05 11:24:12 -04:00 |
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Rejeesh Kutty
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53af7f3c1f
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ml605: initial checkin
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2014-05-05 11:20:26 -04:00 |
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Rejeesh Kutty
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1d50489870
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ad9361: ml605 updates
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2014-05-05 11:03:57 -04:00 |
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Rejeesh Kutty
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4d4f66fbdd
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a5soc: increase pipeline for qsys
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2014-05-04 10:38:53 -04:00 |
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Rejeesh Kutty
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5f2fb45b24
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library: ported hdmi tx to altera
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2014-05-02 12:07:47 -04:00 |
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Rejeesh Kutty
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b55d0d7ad1
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a5soc: constraints for false paths
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2014-04-30 16:14:30 -04:00 |
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Rejeesh Kutty
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a10043c4f4
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kcu105: base complete with ethernet errors
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2014-04-30 14:41:43 -04:00 |
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Rejeesh Kutty
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87d326a474
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ignore cache
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2014-04-30 14:41:41 -04:00 |
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Rejeesh Kutty
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ef60cce15e
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kcu105: added
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2014-04-30 14:41:40 -04:00 |
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Rejeesh Kutty
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be69c0c330
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kcu105: initial checkin
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2014-04-30 14:41:39 -04:00 |
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Rejeesh Kutty
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9900a56fa5
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kcu105: initial checkin
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2014-04-30 14:41:37 -04:00 |
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Rejeesh Kutty
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0b1ce14842
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a5soc: basic hardware build
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2014-04-30 12:40:27 -04:00 |
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Rejeesh Kutty
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99d66e7580
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a5soc: initial-copy version
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2014-04-30 12:40:26 -04:00 |
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Rejeesh Kutty
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681e4239df
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ad9671/a5gt: subclass-0 version
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2014-04-28 21:31:21 -04:00 |
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Rejeesh Kutty
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06873aeddb
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ad9671/a5gt: subclass-0 version
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2014-04-28 21:31:20 -04:00 |
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Rejeesh Kutty
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d66f256f1c
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9671/a5gt: 9671-sc1 version
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2014-04-28 21:31:19 -04:00 |
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Rejeesh Kutty
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f55288ef5d
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ad9671: altera - base changes
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2014-04-28 21:31:18 -04:00 |
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Rejeesh Kutty
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02e8b27626
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initial checkin-9250 copy
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2014-04-28 21:31:16 -04:00 |
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Rejeesh Kutty
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2e7bf190b5
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initial checkin-9250 copy
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2014-04-28 21:31:15 -04:00 |
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Adrian Costina
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01de117b5f
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motor_control: Changed controller to PID controller. Some estetic changes
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2014-04-28 17:57:51 +03:00 |
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Rejeesh Kutty
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fa998a406b
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dma: parameter fix
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2014-04-24 15:50:16 -04:00 |
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Rejeesh Kutty
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314ec3d343
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altera-9250/dma: make id width generic
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2014-04-24 14:54:19 -04:00 |
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Rejeesh Kutty
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dfc2bba335
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ad9671: updates to allow default adc setup routines
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2014-04-23 16:39:28 -04:00 |
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Rejeesh Kutty
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a1bcf345c6
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ad9671: fix spi connections
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2014-04-21 13:46:44 -04:00 |
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Adrian Costina
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213e852e11
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motor_control: Initial commit
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2014-04-18 18:57:18 +03:00 |
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Rejeesh Kutty
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503096de18
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gt: change userready on drp clock
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2014-04-17 16:09:55 -04:00 |
Istvan Csomortani
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b185d46573
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Add a link to EngineerZone
Some users find these projects through github, and they do not know how/where to ask support.
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2014-04-15 10:25:18 +03:00 |
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Adrian Costina
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ba44ee63be
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fmcomms1: modified the fmcomms1_bd.tcl to make it compatible with latest wfifo
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2014-04-14 17:04:04 +03:00 |
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Istvan Csomortani
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179d6d601c
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adi_board.tcl : Use 'global' instead of '$::'
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2014-04-14 11:45:35 +03:00 |
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Rejeesh Kutty
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38126c404c
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usdrx1: spi signal definitions
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2014-04-11 14:28:23 -04:00 |