zcy
/
pluto_hdl_adi
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity
714 Commits
1 Branch
0 Tags
23 MiB
Commit Graph

714 Commits (11f41d1dff2bef47452e58d99e71312cd10ab405)

Author SHA1 Message Date
Michael Hennerich 2beaeb9176 projects/daq2/kcu105/system_constr.xdc: temp constrains 
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
 2014-10-21 15:03:55 +02:00
Michael Hennerich 8a4ab4e05a projects/ad9434_fmc/common/ad9434_bd.tcl: Fix freeze - Design doesn't use SYNC 
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
 2014-10-21 15:03:55 +02:00
Rejeesh Kutty d4a21d9775 ad9625_fmc: constraints fix 2014-10-20 10:00:39 -04:00
Istvan Csomortani b3c784f76a ad9467_fmc: Made some cosmetic changes on the block design script. 2014-10-20 13:28:34 +03:00
Istvan Csomortani 4b8720b551 fmcomms2_zc706: Remove top level constraints 
Remove all the unnecessary top level constraint definitions.
 2014-10-20 13:25:01 +03:00
Istvan Csomortani 7115864b4c ad9434_fmc: Remove top level constraints 
Remove all the unnecessary top level constraint definitions.
 2014-10-20 13:23:37 +03:00
Istvan Csomortani 5deffd57b1 zed: Remove top level constraints 
Remove top level constraints from the ZED base design.
 2014-10-20 13:20:27 +03:00
Istvan Csomortani 0c56e5b912 ad9434_fmc: Fix GPIO width 
GPIO port width is 15 instead of 32
 2014-10-20 10:59:30 +03:00
Rejeesh Kutty 7f8270d74b ad9625_fmc: generic dma fifo for zynq and non-zynq boards 2014-10-17 14:38:16 -04:00
Rejeesh Kutty 0b30f98640 ad9625_fmc/zc706: remove top level constraints 2014-10-17 14:38:15 -04:00
Rejeesh Kutty f3c9627cae adi_project: demote reset warnings to info 2014-10-17 14:38:13 -04:00
Rejeesh Kutty 14ccdaaa78 kcu105: removed spdif reset 2014-10-17 14:00:00 -04:00
Rejeesh Kutty 46d1710539 axi_ad9625: added constraints 2014-10-17 13:57:30 -04:00
Rejeesh Kutty 37b608f397 axi_ad9144: added constraints 2014-10-17 13:57:09 -04:00
Rejeesh Kutty 380eeec013 daq2/kcu105: ethernet fix 2014-10-17 13:48:35 -04:00
Rejeesh Kutty fca0714478 adv7511/kcu105: ethernet fix 2014-10-17 13:48:33 -04:00
Rejeesh Kutty e73b3b52dc kcu105: ethernet fix 2014-10-17 13:47:50 -04:00
Rejeesh Kutty df3915e2b0 ad9625: constraints added 2014-10-17 13:41:56 -04:00
Adrian Costina 819a3d0802 util_adc_pack: removed latches 2014-10-17 15:40:16 +03:00
Rejeesh Kutty 2600b1f359 daq3: tx interleave and dma fifo axi streaming 2014-10-15 14:51:04 -04:00
Rejeesh Kutty 6d76e0b768 zc706: remove top level constraints 2014-10-15 14:51:02 -04:00
Rejeesh Kutty 9d43a08865 gt: constraint modifications 2014-10-15 14:51:01 -04:00
Rejeesh Kutty 86724f7fc7 gt: tx lane interleaving 2014-10-15 14:51:00 -04:00
Rejeesh Kutty 206b96d55a ip: constraint changes 2014-10-15 14:50:58 -04:00
Rejeesh Kutty 5715c5b28f dmafifo: axi stream interface 2014-10-15 14:50:57 -04:00
Rejeesh Kutty f0b25c39a3 wfifo: added axi stream support 2014-10-15 14:50:56 -04:00
Rejeesh Kutty 0aed11fa6c adi_project: demote useless warnings 2014-10-15 14:50:54 -04:00
Rejeesh Kutty 51a15a28b7 axi_fifo2s: added constraints 2014-10-15 14:50:53 -04:00
Lars-Peter Clausen 4d4a7981f2 fmcomms1: Connect DMA controller directly to the HP ports 
The AXI DMAC controller nativly supports AXI3, there is no need to insert a interconnect to do protocol conversion.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
 2014-10-15 18:46:07 +03:00
Lars-Peter Clausen 7d3be14ab5 common: Connect audio clkgen reset 
While we are at it also hide the unused locked pin.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
 2014-10-15 18:44:46 +03:00
Lars-Peter Clausen fd89458708 common: Set cpu interconnect strategy to minimize area 
There will rarely be concurrent access to the peripheral control bus
interconnect, so there is no need to optimize for performace. Setting the
interconnect strategy to minimize area can reduce the resource usage by
~90%.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
 2014-10-15 18:43:54 +03:00
Istvan Csomortani d2a04856a9 common: Fix xlconstant output pin name 
On 2014.2 xlconstant output pin name is 'dout'.
 2014-10-15 15:37:06 +03:00
Istvan Csomortani 02802644bf fmcjesdadc1: Fix a few warning and issue with ILA 
+ GPIO width is 15
+ Fix ILA core
 2014-10-15 15:37:05 +03:00
Adrian Costina 865cbab3a2 ad9671_fmc: Updated a5gt project with start of frame information 2014-10-15 10:53:33 +03:00
Adrian Costina 8934a66013 usdrx1: Update project so that the AD9671 cores can be synchronized 2014-10-13 17:06:40 +03:00
Istvan Csomortani f528873fa9 fmcomms2: Add an additional SPI interface for up/down converter board 
Supported carriers are: ZC706, ZC702 and Zed.
 2014-10-10 18:47:07 +03:00
Istvan Csomortani ca4c961891 fmcomms2: Use ad_iobuf instance on system_top 
Use ad_iobuf instance on system top, instead of separate IOBUF instances.
 2014-10-10 18:45:39 +03:00
Istvan Csomortani e21d26e456 fmcomms2: Cosmetic changes 
Get rid of unwanted whitespaces.
 2014-10-10 18:25:17 +03:00
Istvan Csomortani fe8a076b2e fmcomms2: Cosmetic changes on *_bd.tcl script 2014-10-10 17:06:32 +03:00
Lars-Peter Clausen 3d5ef9a8ed util_dac_unpack: Fix unpack order with 1 channel 
Due to the delay between the dac_valid and the fifo_valid signal we need to
have two counters. One counter which counts the number of incoming
dac_valid signals and generates the dma_rd signal and one counter for the
offset which gets set to 0 when fifo_valid is set.

This fixes issues with the unpack order when only one channel is active.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
 2014-10-10 16:26:14 +03:00
Lars-Peter Clausen dd70320b00 axi_spdif: Add missing signals to the regmap read sensitifity list 
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
 2014-10-10 16:26:09 +03:00
Lars-Peter Clausen e7af6219dd axi_spdif: Don't use non-static expressions in port assignments 
Fixes a warning from the tools.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
 2014-10-10 16:26:05 +03:00
Lars-Peter Clausen ab5eee42e4 axi_spdif: Set unused signals to 0 
Fixes warnings about undriven signals from the tools.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
 2014-10-10 16:26:00 +03:00
Lars-Peter Clausen 0b587e6fb1 axi_i2s: Add missing signals to the regmap read process sensitivity list 
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
 2014-10-10 16:25:56 +03:00
Lars-Peter Clausen cf2bbf66b7 axi_i2s: Set unused signals to 0 
Fixes warnings from the tools about undriven signals.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
 2014-10-10 16:25:51 +03:00
Lars-Peter Clausen 22169c4a9c axi_dmac: Add default driver values for optional input ports 
This silences warnings from the tools about undriven ports.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
 2014-10-10 16:25:46 +03:00
Lars-Peter Clausen e7dbdff60c axi_dmac: Hide fifo_wr_sync signal if C_SYNC_TRANSFER_START != 1 
The fifo_wr_sync signal is only used when C_SYNC_TRANSFER_START = 1, so hide it otherwise.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
 2014-10-10 16:25:41 +03:00
Lars-Peter Clausen 8557073b56 axi_dmac: Hide fifo_wr bus when source type is not the fifo interface 
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
 2014-10-10 16:25:33 +03:00
Lars-Peter Clausen 3e6f553ce3 axi_dmac: Add clock signal spec for m_axis/s_axis bus 
This silences warnings from the tools about having no clock assigned to the bus.
Also fix the name of the TVALID signal.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
 2014-10-10 16:25:24 +03:00
Lars-Peter Clausen 7a9e694446 fmcomms2: Connect DMA directly to the HP ports 
The DMA controller is able to send AXI3 compatible requests, no need to add
a interconnect for protocol conversion in between the DMA controller and the
HP port.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
 2014-10-10 16:25:14 +03:00