Commit Graph

19 Commits (10898d6618f745ddf1d75b8e64f18e54d49aede7)

Author SHA1 Message Date
Rejeesh Kutty 3db1050e91 pzsdr2/ccfmc: enable eth1 mdio 2017-05-22 13:38:36 -04:00
AndreiGrozav 485c810c2c pzsdr*: Automatic IP version update 2017-05-02 11:43:32 +03:00
Lars-Peter Clausen 0e6cc95d0d pzsdr1/pzsdr2: audio_clkgen: Disable clock source buffer insertion
Depending on the configuration of the clock source type of the input clock
the clocking wizard will instantiate all kinds of buffers on the input
clock signal.

For these particular projects there is no need to add any kind of buffer
since the source is already coming from a global clock buffer.  So set the
configuration accordingly.

Avoids the following warning:
	[Opt 31-32] Removing redundant IBUF since it is not being driven by a
	top-level port. i_system_wrapper/system_i/sys_audio_clkgen/inst/clkin1_ibufg
	Resolution: The tool has removed redundant IBUF. To resolve this
	warning, check for redundant IBUF in the input design.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2017-04-21 13:22:33 +02:00
Lars-Peter Clausen 95a46bf1e1 pzsdr1/pzsdr2: audio_clkgen: Disable phase alignment
There is no need for the audio clock to be phase aligned to its source
clock. When phase alignment is disabled the MMCM uses an internal feedback
path without requiring external resources, so disable it.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2017-04-21 13:22:33 +02:00
Lars-Peter Clausen cfc51016ea pzsdr1/pzsdr2: audio_clkgen: Infer input clock frequency
Instead of manually specifying the input clock frequency let the core infer
it automatically. This makes it more straight forward to change the clock
frequency.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2017-04-21 13:22:19 +02:00
Rejeesh Kutty ddfbdfd2f7 pzsdr1/pzsdr2- ccbox added tws 2017-04-18 11:37:23 -04:00
Adrian Costina 27119343f2 pzsdr2: ccusb, connect unused clock pins to GND 2017-02-14 11:56:54 +02:00
Adrian Costina fa37f4dd0a pzsdr2: Don't set a disabled parameter 2017-02-14 11:56:08 +02:00
Adrian Costina 319a883c00 pzsdr2: Added FIFOs for DAC and ADC paths so that they work at l_clk/2 or l_clk/4 2017-01-18 12:00:10 +02:00
Adrian Costina 6e89ac3d65 pzsdr2: ccusb_lvds, add flag_a,flag_b signals 2016-11-30 17:39:02 +02:00
Rejeesh Kutty 4e3e623530 pzsdr2/ccpci- updates 2016-11-23 14:02:59 -05:00
Adrian Costina 3d0049d274 pzsdr2: ccusb_lvdsr, updated project for the latest schematic 2016-11-22 16:55:52 +02:00
Lars-Peter Clausen 0d75bcb606 pzsdr2: ccbox: Use DMA interface 0+1 for audio
There is a bug in the ps7 component specification that causes critical
warnings to appear in the build log if DMA interface 0 is disabled, but any
other DMA interface is enabled.

Work around this issue by using DMA interface 0 and 1 instead of 1 and 2
for the I2S DMA.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2016-11-18 14:03:46 +01:00
Rejeesh Kutty c2b7cbd61b ccbox- constraints 2016-11-17 10:23:51 -05:00
Rejeesh Kutty 5e6b931150 ccbox- added 2016-11-17 09:28:33 -05:00
Rejeesh Kutty fb5d36b250 pzsdr2- update ccfmc 2016-11-16 16:27:41 -05:00
Rejeesh Kutty 95c44b687e pzsdr2- fmc/pci constraints 2016-11-16 16:27:41 -05:00
Rejeesh Kutty db243df97e pzsdr2- updates 2016-11-15 14:16:06 -05:00
Rejeesh Kutty cfd3ea61f1 pzsdr-to-pzsdr2 2016-11-14 14:12:22 -05:00