Commit Graph

240 Commits (0e8f55b2d7947cfb8007f9b27251b898ddfc9886)

Author SHA1 Message Date
Rejeesh Kutty 43037a42eb scripts: 2014.4 update 2014-12-23 14:03:51 -05:00
Lars-Peter Clausen 84052ad437 Add Vivado version check to adi_project_create
The scripts generating the projects files typically only work correctly with
one specific version of Vivado. If a incorrect version is used the script
may fail at some point with a cryptic error message or may not fail but
create a bitstream that is not working as expected, e.g. unconnected
signals, etc. This patch adds a version check to adi_project_create that
will error out early on stating that the wrong version of Vivado was used
and which is the right version to use.

By default the required version will be the version that is required by the
common scripts. Individual projects can overwrite the required version by
setting the REQUIRED_VIVADO_VERSION variable to the required version or can
bypass the version check completely by setting the IGNORE_VERSION_CHECK
variable to 1.

Callers of the script can also disable the version check by setting the
ADI_IGNORE_VERSION_CHECK environment variable.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2014-11-26 10:46:34 +01:00
Istvan Csomortani 1834cf6d38 adi_prcfg_project: Update the PR design flow
Optimization directive kept on default in the implementation flow.
2014-11-21 19:26:33 +02:00
Istvan Csomortani c0f4d7e2b5 mitx045_common: Definition file patch
In 2014.2 tool version, the way how a definition file needs to be applied is different
The command "apply_bd_automation" should be used, instead setting property PCW_IMPORT_BOARD_PRESET
In non-project mode (PR design flow), after creating the static design the type of the board is set.

NOTE: the definition file for mitx must be installed accordingly in order to get this work
See link: http://zedboard.org/support/documentation/2056
2014-11-21 19:14:37 +02:00
Istvan Csomortani bbf1f0c156 adi_project: Add board definition for mitx045 2014-11-18 10:05:57 +02:00
Istvan Csomortani eaacd4d49a adi_project.tcl: Fix message severity (working solution)
Need to define the default/initial severity too.
2014-11-13 18:55:43 +02:00
Istvan Csomortani 4bcf338e9b adi_project.tcl : Fix message severity
When message severity is set to 'error', need to do it quiet, other way the tool will stop after synthesis, complaining for previous errors.
2014-11-13 16:33:47 +02:00
Istvan Csomortani 776a396141 adi_project.tcl: Add new message severity definition
Set "Parameter does not exist!" message severity to error.
2014-11-11 19:20:40 +02:00
Rejeesh Kutty c1268f089d scripts: hp/mem updates 2014-11-10 15:06:20 -05:00
Istvan Csomortani e0b7ef2f4f scripts: Update scripts for PR design flow
+ Rewrite the pr_verify process, to improve verification time
 + Update the implementation flow: always the biggest logic will be implemented first, to achieve a better result
    therefore force the tool to optimize the first logic with 'ExploreSequentialArea'
 + Make utilization report just from the PR pblock, that's more relevant as the utilization report of the whole fabric
2014-10-30 18:51:13 +02:00
Rejeesh Kutty fd66affa42 scripts: add default memory interconnect 2014-10-27 15:53:20 -04:00
Rejeesh Kutty fc4e002150 scripts: add mb cpu side 2014-10-27 15:53:19 -04:00
Rejeesh Kutty 54f341fad8 scripts: sdk export before timing check 2014-10-27 09:59:52 -04:00
Rejeesh Kutty 4494998940 scripts: ignore another variant of reset warning 2014-10-27 09:59:51 -04:00
Rejeesh Kutty f3c9627cae adi_project: demote reset warnings to info 2014-10-17 14:38:13 -04:00
Rejeesh Kutty 0aed11fa6c adi_project: demote useless warnings 2014-10-15 14:50:54 -04:00
Rejeesh Kutty 210da4116f scripts: initial commit 2014-10-03 16:13:34 -04:00
Istvan Csomortani f2cd7626f5 adi_project : ZC706 board name changed on 2014.2 2014-09-22 17:33:49 +03:00
Istvan Csomortani 49a77c0413 prcfg: Generate configuration files to *.bin 2014-07-24 09:43:00 +03:00
Rejeesh Kutty 57bb3705f2 zc706-plddr3: read changes to lower dma clock 2014-06-25 09:20:58 -04:00
Istvan Csomortani 3d8d576532 prcfg_script: Update the PR flow script
+ Make part global
  + No need the Explore directive on implementation
  + Fix some reference to pr module
  + Fix the pr_verify function
2014-06-13 20:33:59 +03:00
Istvan Csomortani bd8d355b05 scripts: Update adi_prcfg_project.tcl
Define a new parameter for the prcfg_init_workspace process:
  prcfg_name_list.
2014-06-06 15:00:23 +03:00
Istvan Csomortani f452e40192 scripts: Initial check in of non-project flow
These processes are used for projects with partial
  reconfiguration. The used design flow in these cases is the
  non-project (batch) design flow.
2014-06-05 14:33:27 +03:00
Adrian Costina c52327d0c6 common,adv7511: Added mitx045 platform. 2014-06-02 11:08:03 +03:00
Rejeesh Kutty 51c0ee1e20 ml605: tcl updates 2014-05-06 09:29:21 -04:00
Rejeesh Kutty ef60cce15e kcu105: added 2014-04-30 14:41:40 -04:00
Istvan Csomortani 179d6d601c adi_board.tcl : Use 'global' instead of '$::' 2014-04-14 11:45:35 +03:00
Istvan Csomortani c718169f27 adi_board.tcl : Fix the address assignment command
A lot of cores have more than one address segments, therefor need
	to filter out the segment of the axi lite interface
2014-04-11 16:14:56 +03:00
Istvan Csomortani cf5b9b51fd adi_board.tcl : Fix spi ports and hp clocks 2014-04-11 15:31:12 +03:00
Istvan Csomortani 37e2059fd0 adi_board.tcl : General update
- Split the adi_dma_interconnect to two procedure:
	  adi_dma_interconnect and adi_hp_assign
	- Fix the adi_spi_core
	- Fix the adi_interconnect_lite
2014-04-10 18:29:14 +03:00
Istvan Csomortani 5b0e37b97a adi_project.tcl : Modify implementation strategy
- Change implementation strategy to Performance Explore.
	  At some projects, this could prevent timing issues, it not
	  increase the overall implementation time in a dramatic way.
2014-04-07 15:02:38 +03:00
Istvan Csomortani 8deb36ce08 adi_board.tcl: All procedures works on Zynq/Microblaze
General patch for the integration procedures. Tested on kc705 and
	zed.
2014-04-01 16:19:24 +03:00
Istvan Csomortani 4ef88a3bed adi_board.tcl : Patch for adi_spi_core process
- Fix indentation
	- Pacth for adi_spi_core process
2014-03-31 16:41:07 +03:00
Istvan Csomortani 7f4f200fce Project scripts: Initial check in of adi_board.tcl
The script contains integration tcl processes.
2014-03-26 19:08:56 +02:00
Adrian Costina 698e9f4757 Added phys_opt_design step for fixing timing
The FMCOMMS1 meets timing on ZED/ZC702 only if the phys_opt_design step
is part of the implmentation flow, with the Explore argument.
"This step performs physical optimizations such as timing-driven
replicaiton of high fanouts nets to improve timing results"
2014-03-19 16:42:44 +02:00
Istvan Csomortani 7a6ce70e19 Fix default repository path for adi_project.tcl
Projects can be build by running 'source system_project.tcl' in
	Vivado Tcl console.
2014-03-13 10:28:16 +02:00
Rejeesh Kutty f3ae57a53e global clock and reset names 2014-03-11 09:57:59 -04:00
Istvan Csomortani 793bf2f350 Change the adi_project_run process to prevent "const_type UCF" issue
- Set the constraint type to XDC before run the synthesis
2014-03-07 11:06:11 +02:00
Rejeesh Kutty 350ec5e633 changed path settings 2014-03-03 10:06:36 -05:00
Rejeesh Kutty ddac1a8834 added common board files 2014-02-28 21:17:01 -05:00