Commit Graph

16 Commits (0e8f55b2d7947cfb8007f9b27251b898ddfc9886)

Author SHA1 Message Date
Laszlo Nagy 10dc090673 .gitignore: add simulation outputs and misc files to the list 2019-11-26 13:43:22 +02:00
Istvan Csomortani 165c8a943b gitignore: Update to the new naming convention 2019-06-29 06:53:51 +03:00
Laszlo Nagy 525c068993 scripts: Support for incremental compilation
The scripts are looking for a previous run result, a routed design
checkpoint to use it as a reference during the incremental build flow.
Before clearing the project files, the scrips will save the reference dcp
file in the project folder.
If the reference dcp does not exists the build continues normally.

Proposed workflow:
  1. Build your project normally with 'make' or place manually a
  reference.dcp file in the Vivado project folder.
  2. Do some minor modifications
  3. Run the make with the following option:
    make MODE=incr
  4. Repeat steps 2-3
2019-04-22 10:27:16 +03:00
Laszlo Nagy 5dd9cdcdea scripts: Add common IP cache location for OOC mode
Using a common IP cache location for all the project will speed up
compile time of common blocks used in base designs. Example a MicroBlaze
core for VCU118 once compiled it will be reused on other projects.

Using a common IP cache will speed up re-compiles of every project in OOC
mode since the cache won't be cleared as with normal compile flow.
2019-04-22 10:27:16 +03:00
Laszlo Nagy 5e92dc45b2 scripts: add support for OOC synthesis flow
Usage:
from command line set any value to the ADI_USE_OOC_SYNTHESIS variable
e.g. export ADI_USE_OOC_SYNTHESIS=y
2019-04-22 10:27:16 +03:00
Lars-Peter Clausen e76c5d7138 Add generated files for Intel projects to .gitignore
The system_db folder is autogenerated and contains all the files that are
generated by the Platform Designer tool.

The extension for Intel binary bitstreams is rbf.

Add both of those to the .gitignore since they should not be under version
control and just end up as clutter in `git status` otherwise.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2018-08-28 15:39:30 +02:00
Lars-Peter Clausen 2b914d33c1 Move Altera IP core dependency tracking to library Makefiles
Currently the individual IP core dependencies are tracked inside the
library Makefile for Xilinx IPs and the project Makefiles only reference
the IP cores.

For Altera on the other hand the individual dependencies are tracked inside
the project Makefile. This leads to a lot of duplicated lists and also
means that the project Makefiles need to be regenerated when one of the IP
cores changes their files.

Change the Altera projects to a similar scheme than the Xilinx projects.
The projects themselves only reference the library as a whole as their
dependency while the library Makefile references the individual source
dependencies.

Since on Altera there is no target that has to be generated create a dummy
target called ".timestamp_altera" who's only purpose is to have a timestamp
that is greater or equal to the timestamp of all of the IP core files. This
means the project Makefile can have a dependency on this file and make sure
that the project will be rebuild if any of the files in the library
changes.

This patch contains quite a bit of churn, but hopefully it reduces the
amount of churn in the future when modifying Altera IP cores.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2018-04-11 15:09:54 +03:00
Istvan Csomortani 180c96bcde Update .gitignore 2016-12-19 15:37:05 +00:00
Istvan Csomortani 0905755db7 Update .gitignore file 2016-03-16 09:18:49 +02:00
Rejeesh Kutty ab612a2411 ignore gui 2015-09-22 16:32:02 -04:00
Rejeesh Kutty 54b4cf04c4 ignore *.hw 2015-08-25 14:24:21 -04:00
Rejeesh Kutty 8bb68af29d ignore xml files 2015-08-14 15:33:11 -04:00
Rejeesh Kutty ff985875a0 gitignore: add non-project stuff 2015-05-01 13:17:14 -04:00
Rejeesh Kutty 4d4f66fbdd a5soc: increase pipeline for qsys 2014-05-04 10:38:53 -04:00
Rejeesh Kutty 87d326a474 ignore cache 2014-04-30 14:41:41 -04:00
Rejeesh Kutty 3becfd5d51 added gitignore 2014-03-05 10:47:16 -05:00