Commit Graph

9 Commits (0c6ef203c0f70041dbcd54d4f2fee9169c69825f)

Author SHA1 Message Date
Istvan Csomortani 15618c9edf daq2 : Integrate the DACFIFO into the supported projects.
+ All pack/unpack logic is made by the cpack and upack modules.
+ The DAC FIFO is integrated between the TX DMA and cpack.
+ All the top files are updated, all the projects compiled successfully.
2015-05-11 12:20:50 +03:00
Rejeesh Kutty 6d0a2bf64c axi_adcfifo: added 2015-04-07 16:21:39 -04:00
Rejeesh Kutty ce5ece5494 daq2/zc706: base system updates 2015-03-09 16:09:54 -04:00
Rejeesh Kutty f99bd3609b plddr3: sys-rst from board pushbutton 2014-12-15 12:59:04 -05:00
Rejeesh Kutty 855919ee8e plddr3: internal buswidth/clock conversion 2014-11-12 14:43:50 -05:00
Rejeesh Kutty 20d59ce39b daq2: dma fifo modifications 2014-10-22 16:39:28 -04:00
Rejeesh Kutty bca8ec0160 daq2: 2014.2 and ver.d 2014-10-06 14:56:01 -04:00
Rejeesh Kutty f94cbbb0aa daq2: register map updates 2014-07-03 12:36:37 -04:00
Rejeesh Kutty 7efd6149f8 daq2: initial checkin 2014-06-12 15:54:25 -04:00