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29 Commits (0c6c28ed849a6841dae54ef69326b0c1da5f666f)

Author SHA1 Message Date
Laszlo Nagy 51b643b978 Makefile: Fix misc makefiles from projects and library 2021-10-05 14:24:48 +03:00
Adrian Costina 591a23156b Makefiles: Update header with the appropriate license 2021-09-16 16:50:53 +03:00
LIacob106 16a93a804b adrv9001[intel]: Add second pair of DMAs 
fix observations for PR
 2021-09-01 15:04:14 +03:00
stefan.raus 63ac142874 adrv9001:a10soc:system_qsys.tcl: set clock polarity to 0 
For fixing "Failed to reset the device and set SPI Config"
error, both clockPolarity and clockPhase should be disabled
or both enabled. By default both are unset.

Signed-off-by: Stefan Raus <stefan.raus@analog.com>
 2021-06-16 11:42:50 +03:00
Laszlo Nagy d9bc014c98 adrv9001/zcu102: Enable independent Tx from Rx in CMOS mode 2021-05-26 15:44:45 +03:00
Laszlo Nagy 568bef4a38 adrv9001/a10soc: Initial version 
This project supports CMOS mode only.
 2021-05-26 15:44:45 +03:00
Laszlo Nagy dcec4fe1b7 adrv9001/zc706: Fix spaces 2021-03-10 10:35:52 +02:00
Laszlo Nagy dc186645d8 adrv9001/zc706: Fix comments HPC to LPC 2021-03-10 10:35:52 +02:00
Laszlo Nagy 677c154134 adrv9001/zcu102/cmos: Loosen up clock skew constraints to match LVDS settings 
Set the same inter clock skew characteristics as used in LVDS mode. The
physical lanes/routes are common on both modes.
 2021-03-04 11:13:10 +02:00
Laszlo Nagy 0dd3173547 adrv9001/zc706: Initial commit 
The project supports CMOS interface only.

VADJ on the ZC706 must be programmed to 1.8V
Instructions can be found here:
https://www.xilinx.com/Attachment/ZC706_Power_Controllers_Reprogramming_Steps.pdf
https://forums.xilinx.com/t5/Xilinx-Evaluation-Boards/ZC706-Doesn-t-work-with-VADJ-at-1-8v/td-p/430086
 2021-03-03 09:03:03 +02:00
Laszlo Nagy dd4c8d6807 adrv9001/zcu102: Add debug header 2021-01-26 15:22:41 +02:00
Laszlo Nagy 728904af09 adrv9001/zcu102: Run postRoutePhysOpt to close Rx1 to Rx2 path timing 2021-01-26 15:22:41 +02:00
Laszlo Nagy bae7e48c50 adrv9001/common: Run DMAs @ 100MHz 2021-01-26 15:22:41 +02:00
Laszlo Nagy bb44e5399f adrv9001/zed: Connect TDD sync to PMOD JA1 2021-01-20 13:00:01 +02:00
Laszlo Nagy 3918d43cd1 adrv9001/zcu102: Add TDD sync to PMOD0 J55.1 2021-01-20 13:00:01 +02:00
Laszlo Nagy fe9f72db9c adrv9001/common: Export TDD mode signal 2021-01-20 13:00:01 +02:00
Laszlo Nagy 18b2a8b0a7 adrv9001/zed: Add TDD support 2021-01-20 13:00:01 +02:00
Laszlo Nagy 0c2745361b adrv9001/zcu102: Add TDD support 2021-01-20 13:00:01 +02:00
Sergiu Arpadi 6f2f2b8626 makefile: Regenerate make files 2021-01-20 01:02:56 +02:00
sergiu arpadi acbbd4636a sysid: Upgrade framework, header/ip are now at 2/1.1.a 
Unify tcl scripts; rename adi_pd_intel.tcl to adi_pd.tcl
add git branch to internal use area; update log prints;
update xilixn projects; fix cn0506 sysid script;
 2021-01-20 01:02:56 +02:00
Adrian Costina 9093a8c428 library: Move ad_iobuf to the common library, as it's not Xilinx specific 
Updated all system_project and Makefiles
 2020-11-02 16:13:35 +02:00
Istvan Csomortani 37254358dd makefile: Regenerate make files 2020-10-20 12:51:10 +03:00
Sergiu Arpadi d8ab27b2af sysid: Remove cstring init string 2020-09-30 19:12:24 +03:00
Laszlo Nagy 24090fafd8 adrv9001/zcu102: Loopback VADJ error to the FMC board 2020-08-31 14:14:03 +03:00
Laszlo Nagy d14376547f adrv9001/zed: Refactor VADJ test in VADJ error 
The ADRV9002 uses in the digital interface 1.8V, however the Zed VADJ is
selectable by a jumper can go up to 3.3V . Voltage levels higher than 1.8V
are detected by the EVAL-ADRV9002 board, asserting the VADJ_ERR pin.
If VADJ error is set high keep all drivers in high-z state and signalize
it to the software layer through a gpio line.
 2020-08-31 14:14:03 +03:00
Laszlo Nagy 72f916fcf5 adrv9001/zcu102: Update interface signal names based on direction 
Let the names of signals from source synchronous interface match the
direction of the signals.
 2020-08-28 13:23:00 +03:00
Laszlo Nagy a212ad6e58 adrv9001/zed: Update interface signal names based on direction 
Let the names of signals from source synchronous interface match the
direction of the signals.
 2020-08-28 13:23:00 +03:00
Laszlo Nagy 118e1f9e8b adrv9001/zed: Initial support for Zed 
CMOS only support for ADRV9001 on ZedBoard
 2020-08-24 17:49:12 +03:00
Laszlo Nagy b27f3ac18f adrv9001:zcu102: Initial version 
Generic project that supports CMOS or LVDS interface for the ADRV9001 transceiver.
 2020-08-24 17:49:12 +03:00