Laszlo Nagy
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3f94fec620
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axi_dmac/dma_write_tb: added data integrity check
Added passing condition checking.
Added variable request sizes
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2018-05-03 14:49:06 +02:00 |
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Laszlo Nagy
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5c2e10eca5
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axi_dmac: added ModelSim support to run_tb.sh
Modified run_tb.sh to work with Modelsim if the SIMULATOR variable is set to
"modelsim"
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2018-05-03 14:49:06 +02:00 |
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Laszlo Nagy
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ee4932ecee
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axi_dmac: made vlog pass
Did minor changes to the code to make ModelSim vlog pass.
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2018-05-03 14:49:06 +02:00 |
Lars-Peter Clausen
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24d17e8bcc
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axi_dmac: Add transfer testbenches
Add simple transfer testbenches that test the read and write to AXI memory
paths of the DMAC.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
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2018-05-03 14:49:06 +02:00 |
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Lars-Peter Clausen
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b3f027fc89
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axi_dmac: Add simple register map testbench
Add a testbench that exercises the basic functionality of the axi_dmac
register map module.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
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2018-05-03 14:49:06 +02:00 |