978f41cbe8
util_adc_pack: Add fifo_wr interface
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Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2015-04-08 13:29:25 +02:00
6ba0667939
axi_dmac: Add fifo_wr/fifo_rd interfaces
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Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2015-04-08 13:29:25 +02:00
c82b186610
Add interface definitions for the fifo_rd and fifo_wr interfaces
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Using interface definitions makes it possible to group pins of a peripheral
into a interface pins. This allows us to use connect_bd_intf_net to connect
all pins of the interface instead of having to manually call connect_bd_net
for each for the pins.
Using interface pins also unclutters the connections in the Vivado block
design view a bit.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2015-04-08 13:29:25 +02:00
11cc18be79
adi_ip.tcl: Initialize ip_repo_paths
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Initialize ip_repo_paths so that when building a peripheral we have access to the interface definitions stored in the repository.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2015-04-08 13:29:25 +02:00
d17cd22ef1
adi_ip.tcl: Allow to directly specify the vlnv string for adi_add_bus()
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Modify the adi_add_bus() function to take the full vlnv strings instead of just the bus type.
This makes the function more flexible and e.g. allows to handle buses from other vendors.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2015-04-08 13:29:25 +02:00
0d0c15df98
axi_adcfifo: fix file names
2015-04-07 16:40:52 -04:00
5f8e9a74ea
makefile: updated
2015-04-07 16:32:01 -04:00
922ea7fb34
util_sync_reset: removed
2015-04-07 16:28:05 -04:00
6d0a2bf64c
axi_adcfifo: added
2015-04-07 16:21:39 -04:00
e73e563a02
util_adcfifo_axi: removed
2015-04-07 16:16:51 -04:00
712becd57f
adcfifo: axi version
2015-04-07 16:16:17 -04:00
4f7f109056
util_adcfifo: added
2015-04-07 16:08:38 -04:00
dfaa6f6571
fifo2s: removed
2015-04-07 16:01:36 -04:00
3c316efbc5
fifo2dac: removed
2015-04-07 16:01:21 -04:00
69cadd46ed
adcfifo_axi: added
2015-04-07 16:00:47 -04:00
056d6bbf40
dacfifo: added
2015-04-07 15:55:29 -04:00
99c124e708
fifo2f: removed
2015-04-07 15:53:22 -04:00
9098e3ebca
fifo: removed
2015-04-07 15:52:31 -04:00
86a70b3054
adcfifo: added
2015-04-07 15:43:02 -04:00
7224ca1f0c
dma: moved
2015-04-07 15:35:47 -04:00
9fa3131858
axi_fifo2dac: Initial commit
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BRAM fifo for high speed DACs
2015-04-07 17:46:36 +03:00
de2c3764d6
util_upack: Updated IP, added upack_valid and dma_xfer_in/dac_xfer_out ports.
2015-04-07 16:55:25 +03:00
8af60576cd
dma: constraints
2015-04-06 13:38:31 -04:00
f79a152958
Makefiles: updated all makefiles adding clean functionality
2015-04-03 11:57:54 +03:00
ba2e635918
makefile: added
2015-04-01 16:28:20 -04:00
2f41aebaa9
makefile: added
2015-04-01 16:28:19 -04:00
a5f937a96d
makefile: added
2015-04-01 16:28:18 -04:00
8b09fedae9
makefile: added
2015-04-01 16:28:16 -04:00
64601272da
makefile: added
2015-04-01 16:28:15 -04:00
e0c7ad802a
makefile: added
2015-04-01 16:28:14 -04:00
b0db485e0d
makefile: added
2015-04-01 16:28:13 -04:00
a10c7a4245
makefile: added
2015-04-01 16:28:11 -04:00
afb7115b2f
makefile: added
2015-04-01 16:28:10 -04:00
90298816e4
makefile: added
2015-04-01 16:28:09 -04:00
96c81013ac
makefile: added
2015-04-01 16:28:08 -04:00
20280fecbe
makefile: added
2015-04-01 16:28:06 -04:00
8ec8c966b1
makefile: added
2015-04-01 16:28:05 -04:00
63efcbf4ca
makefile: added
2015-04-01 16:28:04 -04:00
1d3129a600
makefile: added
2015-04-01 16:28:03 -04:00
00411a53da
makefile: added
2015-04-01 16:28:01 -04:00
15c25ac45b
makefile: added
2015-04-01 16:28:00 -04:00
a63d4ae65c
makefile: added
2015-04-01 16:27:59 -04:00
4222b35292
makefile: added
2015-04-01 16:27:58 -04:00
9ced8643c6
makefile: added
2015-04-01 16:27:56 -04:00
109a38e0e8
makefile: added
2015-04-01 16:27:55 -04:00
871460016d
makefile: added
2015-04-01 16:27:54 -04:00
c0a4c6e046
makefile: added
2015-04-01 16:27:52 -04:00
5a5ffb7745
makefile: added
2015-04-01 16:27:51 -04:00
54ee0a0273
makefile: added
2015-04-01 16:27:50 -04:00
3dbbb4e5bb
makefile: added
2015-04-01 16:27:49 -04:00
566e8d7fd3
makefile: added
2015-04-01 16:27:47 -04:00
500f71af2f
makefile: added
2015-04-01 16:27:46 -04:00
4e7538fc8b
makefile: added
2015-04-01 16:27:45 -04:00
13a40af558
makefile: added
2015-04-01 16:27:44 -04:00
36b629dab1
makefile: added
2015-04-01 16:27:42 -04:00
856220e9e9
makefile: added
2015-04-01 16:27:41 -04:00
43f5025ecd
makefile: added
2015-04-01 16:27:40 -04:00
5b18d12c23
makefile: added
2015-04-01 16:27:39 -04:00
f20ab424f7
makefile: added
2015-04-01 16:27:37 -04:00
4ab17615ce
makefile: added
2015-04-01 16:27:36 -04:00
234d4ae7f3
makefile: added
2015-04-01 16:27:35 -04:00
55406b7a61
makefile: added
2015-04-01 16:27:34 -04:00
6cff03390c
makefile: added
2015-04-01 16:27:32 -04:00
a97fc603f8
makefile: added
2015-04-01 16:27:31 -04:00
35205c43a1
makefile: added
2015-04-01 16:27:30 -04:00
1b5737968a
makefile: added
2015-04-01 16:27:29 -04:00
6ac43fe516
makefile: added
2015-04-01 16:27:27 -04:00
c2e626d0b6
axi_hdmi_tx: es split
2015-04-01 15:08:24 -04:00
3bca324c33
hdmi_rx: 64bit + es split
2015-04-01 14:25:55 -04:00
56165b89f7
hdmi_rx: 64bit + es split
2015-04-01 14:25:49 -04:00
01d0b495ec
hdmi_rx: 64bit + es split
2015-04-01 14:25:45 -04:00
d4763fe356
hdmi_rx: 64bit + es split
2015-04-01 14:25:41 -04:00
11d94b736a
util_gmii_to_rgmii: Added to dev branch
2015-04-01 17:22:49 +03:00
ae26c7817e
Remove util_sync_reset
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The util_sync_reset peripheral hasn't been used in a while and will not be
used in new projects. So remove it.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2015-04-01 14:46:41 +02:00
fd7a423f74
axi_dmac: Reset data stream resize blocks when disabled
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When the DMA controller gets disabled in the middle of a transfer it is
possible that the resize block contains a partial sample. Starting the next
transfer the partial sample will appear the begining of the new stream and
also cause a channel shift.
To avoid this make sure to reset and flush the resize blocks when the DMA
controller is disabled.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2015-04-01 14:18:34 +02:00
2d7bae2ba6
axi_mc_controller: Added delay module
2015-04-01 12:22:20 +03:00
de12184038
axi_mc_speed: Updated for motor control revision 2
2015-04-01 11:43:22 +03:00
d5fa0071bd
axi_mc_current_monitor: Updated for motor control revision 2
2015-04-01 11:42:28 +03:00
6ee66df41e
axi_mc_controller: Updated for motor control revision 2
2015-04-01 11:41:33 +03:00
4b1d9fc86b
axi_dmac: Modified in order to avoid vivado crash
2015-04-01 11:39:25 +03:00
e116822059
imageon_zc706: Updates and fixes
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+ sync the sof to the dma_de signal
+ hdmi_rx_dma is connected to the HP1
+ fix syncronization signal in the CSC module
+ hdmi_rx_clk is asynchronous
2015-03-27 18:57:32 +02:00
0e1a60e8b7
axi_dmac: Brought up the transfer request signal for the dest_fifo and dest_axi_stream interface.
2015-03-26 12:20:32 +02:00
6ee9b3a1e2
util_wfifo: Fixed reset
2015-03-25 15:34:21 +02:00
552d9b41f7
imageon: updates
2015-03-24 15:08:48 -04:00
b29e97f985
hdmi_rx: imageon updates
2015-03-24 15:08:48 -04:00
ffe410b2dd
hdmi_rx: imageon updates
2015-03-24 15:08:48 -04:00
09bb184505
hdmi_rx: imageon updates
2015-03-24 15:08:48 -04:00
f92011f72d
hdmi_rx: imageon updates
2015-03-24 15:08:48 -04:00
5d50d38c66
hdmi_rx: imageon updates
2015-03-24 15:08:48 -04:00
80c2a5a45d
axi_hdmi_rx: General clean up
2015-03-23 12:39:26 +02:00
8f5551718e
axi_fifo2s: false paths on up_xfer_toggle
2015-03-19 16:33:14 -04:00
7e15fd9e5b
util_upack: Fixed ip
2015-03-19 16:22:12 +02:00
bc04e5a4ce
axi_i2s_adi: Fixed pins directions
2015-03-12 17:22:52 +02:00
8dfcbdfd48
gt_channel/gt_common: simulation parameter warning fix
2015-03-06 12:36:07 -05:00
57e1f0e334
gt_channel/gt_common: simulation parameter warning fix
2015-03-06 12:36:03 -05:00
2d01955042
up_gt: change version dfe/lpm support
2015-03-05 09:47:16 -05:00
6995f63134
Add version check to adi_ip.tcl too.
2015-03-05 11:55:09 +02:00
1613f7fb41
cftl_cip: Add util_pmod_fmeter IP to library
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Frequency meter IP for CN0332.
2015-02-23 17:20:12 +02:00
65bda6505e
axi_dmac: Correctly handle shutdown for the request splitter
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We need to make sure to not prematurely de-assert the s_valid signal for the
request splitter when disabling the DMAC. Otherwise it is possible that
under certain conditions the DMAC is disabled with a partially accepted
request and when it is enabled again it will continue in an inconsistent
state which can lead to transfer corruption or pipeline stalls.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2015-02-19 17:22:23 +01:00
731e1c0996
axi_dmac: Use internal enable signal for the request generator
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All components should use the internal 'do_enable' signal instead of the
external 'enable' signal. The former correctly incorporates the shutdown
sequence and does not get asserted again until the shutdown has been
completed. Using the external signal can cause problems when it is disabled
and enabled again in close proximity.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2015-02-19 17:22:23 +01:00
Lars-Peter Clausen
Rejeesh Kutty
Istvan Csomortani
Adrian Costina