256 Commits (084d44c9780640ca93fd847b1d9ec70dd65f5c67)

Author	SHA1	Message	Date
Adrian Costina	698e9f4757	Added phys_opt_design step for fixing timing ... The FMCOMMS1 meets timing on ZED/ZC702 only if the phys_opt_design step is part of the implmentation flow, with the Explore argument. "This step performs physical optimizations such as timing-driven replicaiton of high fanouts nets to improve timing results"	2014-03-19 16:42:44 +02:00
Istvan Csomortani	7a6ce70e19	Fix default repository path for adi_project.tcl ... Projects can be build by running 'source system_project.tcl' in Vivado Tcl console.	2014-03-13 10:28:16 +02:00
Rejeesh Kutty	f3ae57a53e	global clock and reset names	2014-03-11 09:57:59 -04:00
Istvan Csomortani	793bf2f350	Change the adi_project_run process to prevent "const_type UCF" issue ... - Set the constraint type to XDC before run the synthesis	2014-03-07 11:06:11 +02:00
Rejeesh Kutty	350ec5e633	changed path settings	2014-03-03 10:06:36 -05:00
Rejeesh Kutty	ddac1a8834	added common board files	2014-02-28 21:17:01 -05:00