Istvan Csomortani
9e8fd8ed9e
base_design: External IIC reset is connected to Vcc
...
External IIC reset is connected to Vcc in case of AC701, KC705 and VC707
2014-12-11 11:14:54 +02:00
Istvan Csomortani
caa0268434
base_design: External IIC reset is connected to Vcc
...
External IIC reset is connected to Vcc in case of AC701, KC705 and VC707
2014-12-11 11:13:07 +02:00
Adrian Costina
86ad9213e0
fmcomms2: Update c5soc system_timing script
2014-12-10 17:54:11 +02:00
Adrian Costina
6ac774a9dd
fmcjesdadc1: Update altera system_timing script
2014-12-10 17:53:29 +02:00
Rejeesh Kutty
e7c920bbd9
fmcomms2/ml605: compilation fixes
2014-12-09 14:32:39 -05:00
Rejeesh Kutty
4cf435ee39
fmcomms2/ml605: compilation fixes
2014-12-09 14:32:39 -05:00
Rejeesh Kutty
8b41034825
fmcomms2/ml605: compilation fixes
2014-12-09 14:32:39 -05:00
Rejeesh Kutty
842ba19aaa
fmcomms2/ml605: compilation fixes
2014-12-09 14:31:12 -05:00
Rejeesh Kutty
d7a6b5e6d0
fmcomms2/ml605: compilation fixes
2014-12-09 14:31:11 -05:00
Rejeesh Kutty
d57b6b01c6
fmcomms2/ml605: compilation fixes
2014-12-09 14:31:10 -05:00
Michael Hennerich
9103f6706e
Merge branch 'hdl_2014_r2' of https://github.com/analogdevicesinc/hdl into hdl_2014_r2
2014-12-09 17:38:37 +01:00
Michael Hennerich
138e789fb6
projects/fmcjesdadc1/common/fmcjesdadc1_bd.tcl: Fix interrupts
...
sys_concat_intc: don't reset NUM_PORTS to 6
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
2014-12-09 17:38:16 +01:00
Rejeesh Kutty
772edbae20
fmcadc4: fifo updates
2014-12-09 10:43:02 -05:00
Rejeesh Kutty
d149890426
fmcadc4: fifo updates
2014-12-09 10:43:02 -05:00
Rejeesh Kutty
dad0745fbe
fmcadc4: fifo updates
2014-12-09 10:43:02 -05:00
Rejeesh Kutty
987257e3c3
fmcadc4: fifo updates
2014-12-09 10:43:01 -05:00
Rejeesh Kutty
0c6cbdd303
fmcadc4: fifo updates
2014-12-09 10:38:51 -05:00
Rejeesh Kutty
f044ab94e0
fmcadc4: fifo updates
2014-12-09 10:38:50 -05:00
Rejeesh Kutty
e2a9502e1e
fmcadc4: fifo updates
2014-12-09 10:38:49 -05:00
Rejeesh Kutty
a2607a8057
fmcadc4: fifo updates
2014-12-09 10:38:47 -05:00
Istvan Csomortani
a6b7b9d880
ad9467_kc705: Fix memory segment offset for SEG_axi_ddr_cntrl
2014-12-09 16:20:39 +02:00
Istvan Csomortani
2e4640d5c5
ad9467_kc705: Fix memory segment offset for SEG_axi_ddr_cntrl
2014-12-09 16:17:46 +02:00
Istvan Csomortani
4d28825741
ad9467_kc705: Fix typos.
2014-12-09 13:46:51 +02:00
Istvan Csomortani
a0d5e7862e
ad9467_kc705: Fix typos.
2014-12-09 12:07:49 +02:00
Istvan Csomortani
915ee7a268
fmcjesdadc1_kc705: Connect the SPI interrupt to the controller
2014-12-09 11:54:16 +02:00
Istvan Csomortani
ee04eb637b
ad9467_kc705: Fix interrupts
2014-12-09 11:54:08 +02:00
Istvan Csomortani
37c3af9929
fmcjesdadc1_kc705: Connect the SPI interrupt to the controller
2014-12-09 11:51:36 +02:00
Istvan Csomortani
b83299c606
ad9467_kc705: Fix interrupts
2014-12-09 11:48:46 +02:00
Rejeesh Kutty
1b4a4bc06e
daq3: compilation fixes - latest changes
2014-12-08 14:51:52 -05:00
Rejeesh Kutty
c0d588ba8c
daq3: compilation fixes - latest changes
2014-12-08 14:51:52 -05:00
Rejeesh Kutty
26d72d306e
daq3: compilation fixes - latest changes
2014-12-08 14:51:51 -05:00
Rejeesh Kutty
abff7097f6
daq3: compilation fixes - latest changes
2014-12-08 14:50:03 -05:00
Rejeesh Kutty
8a72a6a0dc
daq3: compilation fixes - latest changes
2014-12-08 14:49:52 -05:00
Rejeesh Kutty
7c3ed75b79
daq3: compilation fixes - latest changes
2014-12-08 14:49:40 -05:00
Rejeesh Kutty
0a8fabe874
Merge branch 'hdl_2014_r2' into dev
...
Conflicts:
projects/fmcadc5/common/fmcadc5_bd.tcl
projects/motcon1_fmc/common/motcon1_fmc_bd.tcl
projects/motcon1_fmc/zed/system_constr.xdc
projects/motcon1_fmc/zed/system_top.v
2014-12-08 11:32:13 -05:00
Rejeesh Kutty
82b9ebe23d
remove replaced projects
2014-12-08 10:45:12 -05:00
Rejeesh Kutty
19e4950b72
renamed to match official names
2014-12-08 10:44:15 -05:00
Adrian Costina
a558d4000d
motcon1_fmc: Added XADC to the project, the external muxing is controlled by generic GPIO, not XADC GPIO
2014-12-08 11:27:47 +02:00
Paul Cercueil
d5572eaa49
ad9265_fmc: Fix unconnected DMA irq
...
Signed-off-by: Paul Cercueil <paul.cercueil@analog.com>
2014-12-05 17:44:47 +01:00
Michael Hennerich
84174460bb
projects/common/kcu105/kcu105_system_bd: Restore axi_ethernet SupportLevel 0
...
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
2014-12-05 14:50:45 +01:00
Michael Hennerich
bb6cc40902
projects/common: KCU105 VC707 update and sync axi_ethernet:6.1 features
...
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
2014-12-05 14:50:45 +01:00
Michael Hennerich
8e4d0a1b60
projects/common: KCU105 VC707 KC705 sync microblaze core defaults
...
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
2014-12-05 14:50:45 +01:00
Michael Hennerich
7e18162632
projects/common/kcu105/kcu105_system_bd: Restore axi_ethernet SupportLevel 0
...
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
2014-12-05 14:48:37 +01:00
Adrian Costina
e6e9c0058d
motor_control: Updated project to Vivado 14.2. Temporary removed XADC
...
- fixed constraints
- updated interrupt system
- used ad_iobuf
- The XADC was removed because the XADC IPI generates vaux inputs 0 and 10 even if 0 and 8 are selected
2014-12-05 11:53:23 +02:00
Adrian Costina
4c05e8de5d
motor_control: Updated project to Vivado 14.2. Temporary removed XADC
...
- fixed constraints
- updated interrupt system
- used ad_iobuf
- The XADC was removed because the XADC IPI generates vaux inputs 0 and 10 even if 0 and 8 are selected
2014-12-05 11:48:00 +02:00
Istvan Csomortani
11f41d1dff
zynq_plddr3: Fix PLDDR3's Reset Generator
...
Reset generator's external reset signal was active low, but the GT reset is active high, and both the DDR controller and FIFO2S were in reset.
Therefore the external reset active state is changed to active high. This setup in general is made by the tool automatically, in order to do it correctly, need to
set this two property of the reset generator.
2014-12-04 15:42:28 +02:00
Istvan Csomortani
34ffa15b12
zynq_plddr3: Fix PLDDR3's Reset Generator
...
Reset generator's external reset signal was active low, but the GT reset is active high, and both the DDR controller and FIFO2S were in reset.
Therefore the external reset active state is changed to active high. This setup in general is made by the tool automatically, in order to do it correctly, need to
set this two property of the reset generator.
2014-12-04 15:39:17 +02:00
Lars-Peter Clausen
58bc7c6886
fmcomms6: Add DMA overflow signal to ILA
...
This is useful for debugging DMA overflows.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2014-12-04 14:23:09 +01:00
Lars-Peter Clausen
a9c6148570
fmcomms6: Better cope with higher sample rates
...
There can be a rather high latency between the last byte of a burst has been send and the time the response for the burst is received. Running at high samplerates this can cause the internal DMA store and forward FIFO to fill up and subsequently stall the DMA pipeline and drop samples. To better cope with the situation double the size of the internal FIFO. Also increase the clock of the AXI bus to be able to accommodate a samplerate of 310MHz.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2014-12-04 13:56:59 +01:00
Lars-Peter Clausen
324c0528c2
fmcomms6: Better cope with higher sample rates
...
There can be a rather high latency between the last byte of a burst has been send and the time the response for the burst is received. Running at high samplerates this can cause the internal DMA store and forward FIFO to fill up and subsequently stall the DMA pipeline and drop samples. To better cope with the situation double the size of the internal FIFO. Also increase the clock of the AXI bus to be able to accommodate a samplerate of 310MHz.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2014-12-04 13:28:37 +01:00
Lars-Peter Clausen
46156b7ceb
fmcomms6: Add DMA overflow signal to ILA
...
This is useful for debugging DMA overflows.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2014-12-04 13:28:37 +01:00
Michael Hennerich
3cc890e604
projects/common: KCU105 VC707 update and sync axi_ethernet:6.1 features
...
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
2014-12-04 09:49:09 +01:00
Michael Hennerich
2d8450abc4
Merge branch 'dev' of https://github.com/analogdevicesinc/hdl into dev
2014-12-04 09:47:46 +01:00
Michael Hennerich
3bc9b25e96
projects/common: KCU105 VC707 KC705 sync microblaze core defaults
...
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
2014-12-04 09:47:02 +01:00
Istvan Csomortani
56a8a54080
ad9625x2_fmc: Increase the dma fifo data depth
2014-12-03 12:13:08 +02:00
Istvan Csomortani
757c213165
ad9625x2_fmc: Integrate the dac spi interface into the SPI interface
2014-12-03 12:06:43 +02:00
Istvan Csomortani
48673fec6a
ad9625x2_fmc: Integrate the dac spi interface into the SPI interface
2014-12-03 12:01:47 +02:00
Istvan Csomortani
80d1314c5e
ad9625x2_fmc: Reverse "Add a separate SPI for the DAC interface"
2014-12-03 10:14:09 +02:00
Istvan Csomortani
d89ed56e10
ad9625x2_fmc: Increase the data depth of the dmafifo
2014-12-02 19:29:19 +02:00
Istvan Csomortani
0007054638
ad9625x2_fmc: Add a separate SPI for the DAC interface
...
DAC spi interface is controlled by an axi_spi core.
Modifications on GPIO layout: pwr_good is 12, vdither 13 and trig is 14.
2014-12-02 19:29:18 +02:00
Rejeesh Kutty
805d52346c
fmcomms7: compilation fixes on plddr3
2014-12-02 10:39:01 -05:00
Rejeesh Kutty
f01d1aae2d
fmcomms7: compilation fixes on plddr3
2014-12-02 10:38:44 -05:00
Lars-Peter Clausen
95e113e1a3
fmcomms6: Connect DMA directly to the HP port
...
The axi_dmac supports native AXI3, there is no need to add a interconnect
for protocol conversion between it and the HP port.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2014-12-01 13:45:45 +01:00
Lars-Peter Clausen
45fc7bb7e2
fmcomms6: Set ila type to native
...
With version 4.0 ila defaults to the AXI monitor type, so explicitly
configure it for native.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2014-12-01 13:45:45 +01:00
Lars-Peter Clausen
5b68b79dec
ad9467_fmc: Set ila type to native
...
With version 4.0 ila defaults to the AXI monitor type, so explicitly
configure it for native.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2014-12-01 13:45:45 +01:00
Lars-Peter Clausen
d773673e4f
fmcomms6: Connect DMA directly to the HP port
...
The axi_dmac supports native AXI3, there is no need to add a interconnect
for protocol conversion between it and the HP port.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2014-12-01 13:44:09 +01:00
Lars-Peter Clausen
5169d3ef59
fmcomms6: Set ila type to native
...
With version 4.0 ila defaults to the AXI monitor type, so explicitly
configure it for native.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2014-12-01 13:44:09 +01:00
Lars-Peter Clausen
3c85c7e2f8
ad9467_fmc: Set ila type to native
...
With version 4.0 ila defaults to the AXI monitor type, so explicitly
configure it for native.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2014-12-01 13:44:08 +01:00
Adrian Costina
7a55db59f6
fmcomms2: Zed, fixed iic multiplexer ad_iobuf connections
2014-11-28 14:19:08 +02:00
Adrian Costina
d5422c2ecc
fmcomms2: Zed, fixed iic multiplexer ad_iobuf connections
2014-11-28 14:17:09 +02:00
Istvan Csomortani
d5a1df2fe6
usdrx1_zc706: Update interrupts.
2014-11-27 14:06:13 +02:00
Istvan Csomortani
eed1981ede
usdrx1_fmc: Fix GT lane number definition.
2014-11-27 14:05:54 +02:00
Istvan Csomortani
a576f7dc98
ad9671_zc706: Update interrupts
2014-11-27 14:05:43 +02:00
Istvan Csomortani
0ccc546aeb
ad9671_fmc: Fix GT lane number definition
2014-11-27 14:05:34 +02:00
Istvan Csomortani
ee7d427123
ad9671_fmc: Cosmetic changes
...
Delete trailing whitespaces.
2014-11-27 14:05:24 +02:00
Istvan Csomortani
4ea86de4db
usdrx1_zc706: Update interrupts.
2014-11-27 14:03:54 +02:00
Istvan Csomortani
d1af4d2951
usdrx1_fmc: Fix GT lane number definition.
2014-11-27 14:03:10 +02:00
Istvan Csomortani
82561b48cc
ad9671_zc706: Update interrupts
2014-11-27 14:02:18 +02:00
Istvan Csomortani
92f85086e3
ad9671_fmc: Fix GT lane number definition
2014-11-27 14:01:36 +02:00
Istvan Csomortani
98e8f21c1d
ad9671_fmc: Cosmetic changes
...
Delete trailing whitespaces.
2014-11-27 14:00:35 +02:00
Istvan Csomortani
419d38b9f6
kc705_base: Define sys_addr_mem_seg for dmafifo
2014-11-26 15:38:41 +02:00
Istvan Csomortani
6fd2f8c913
daq2_fmc: Update interrupts
...
Update interrupts for ZC706 and KC705 carrier.
2014-11-26 15:38:24 +02:00
Istvan Csomortani
bfd89dc9c7
daq2_kc705: Fix constraint file
...
I/O standard for trig_[p/n] is LVDS_25
2014-11-26 15:38:10 +02:00
Istvan Csomortani
630f26442a
daq2_kc705: Instantiate dmafifo module
2014-11-26 15:37:57 +02:00
Istvan Csomortani
00c7b23b21
daq2_fmc: Cosmetic changes
...
Delete trailing whitespaces, no functional changes.
2014-11-26 15:37:48 +02:00
Istvan Csomortani
12f1873e17
kc705_base: Define sys_addr_mem_seg for dmafifo
2014-11-26 15:08:55 +02:00
Istvan Csomortani
8dad54b6e3
daq2_fmc: Update interrupts
...
Update interrupts for ZC706 and KC705 carrier.
2014-11-26 13:53:18 +02:00
Istvan Csomortani
4b6968c2af
daq2_kc705: Fix constraint file
...
I/O standard for trig_[p/n] is LVDS_25
2014-11-26 13:51:46 +02:00
Istvan Csomortani
14193cf4bd
daq2_kc705: Instantiate dmafifo module
2014-11-26 13:50:42 +02:00
Istvan Csomortani
f28845cc0d
daq2_fmc: Cosmetic changes
...
Delete trailing whitespaces, no functional changes.
2014-11-26 13:48:48 +02:00
Adrian Costina
199e86d715
fmcomms2: Added iic_fmc_intr to the zed top file
2014-11-26 11:47:16 +02:00
Adrian Costina
03751827cb
fmcomms2: Updated vc707 project
...
- updated constraints
- updated interrupts
- used ad_iobuf
- added linear_flash
2014-11-26 11:47:06 +02:00
Adrian Costina
40c5816bd7
fmcomms2: Updated mitx045 project. Updated constraints. Updated interrupts
2014-11-26 11:46:53 +02:00
Lars-Peter Clausen
84052ad437
Add Vivado version check to adi_project_create
...
The scripts generating the projects files typically only work correctly with
one specific version of Vivado. If a incorrect version is used the script
may fail at some point with a cryptic error message or may not fail but
create a bitstream that is not working as expected, e.g. unconnected
signals, etc. This patch adds a version check to adi_project_create that
will error out early on stating that the wrong version of Vivado was used
and which is the right version to use.
By default the required version will be the version that is required by the
common scripts. Individual projects can overwrite the required version by
setting the REQUIRED_VIVADO_VERSION variable to the required version or can
bypass the version check completely by setting the IGNORE_VERSION_CHECK
variable to 1.
Callers of the script can also disable the version check by setting the
ADI_IGNORE_VERSION_CHECK environment variable.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2014-11-26 10:46:34 +01:00
Adrian Costina
303a2683a2
fmcomms2: Added iic_fmc_intr to the zed top file
2014-11-26 11:26:58 +02:00
Adrian Costina
6227bc82c0
fmcomms2: Updated vc707 project
...
- updated constraints
- updated interrupts
- used ad_iobuf
- added linear_flash
2014-11-26 11:25:19 +02:00
Adrian Costina
2f77daf71d
fmcomms2: Updated mitx045 project. Updated constraints. Updated interrupts
2014-11-26 11:21:20 +02:00
Istvan Csomortani
626b719ad8
ad6676ebv_vc707: Update the interrupts
2014-11-26 10:56:47 +02:00
Istvan Csomortani
322324b891
ad6676evb_vc707: Add support for linear flash
2014-11-26 10:56:36 +02:00
Istvan Csomortani
67f82c9e3e
ad6676_fmc: Fix GT lane number definition
2014-11-26 10:56:23 +02:00
Istvan Csomortani
5e70ef4ab9
ad6676ebv_vc707: Update the interrupts
2014-11-26 10:49:14 +02:00
Istvan Csomortani
72f9dd226a
ad6676evb_vc707: Add support for linear flash
2014-11-26 10:48:27 +02:00
Istvan Csomortani
d75487d0a2
ad6676_fmc: Fix GT lane number definition
2014-11-26 10:45:00 +02:00
Lars-Peter Clausen
81f0e417d4
Add Vivado version check to adi_project_create
...
The scripts generating the projects files typically only work correctly with
one specific version of Vivado. If a incorrect version is used the script
may fail at some point with a cryptic error message or may not fail but
create a bitstream that is not working as expected, e.g. unconnected
signals, etc. This patch adds a version check to adi_project_create that
will error out early on stating that the wrong version of Vivado was used
and which is the right version to use.
By default the required version will be the version that is required by the
common scripts. Individual projects can overwrite the required version by
setting the REQUIRED_VIVADO_VERSION variable to the required version or can
bypass the version check completely by setting the IGNORE_VERSION_CHECK
variable to 1.
Callers of the script can also disable the version check by setting the
ADI_IGNORE_VERSION_CHECK environment variable.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2014-11-25 18:35:11 +01:00
Adrian Costina
2e72a2cc0c
fmcomms1: Updated VC707 project with latest interrupts and linear flash. Fixed constraints and constraint priority
2014-11-25 15:00:00 +02:00
Adrian Costina
dbc9da8598
fmcomms1: Updated KC705 project with latest interrupts. Fixed constraints and constraint priority
2014-11-25 14:56:22 +02:00
Adrian Costina
87324d8a14
fmcomms1: Updated AC701 project with latest interrupts. Fixed constraints and constraint priority
2014-11-25 14:54:01 +02:00
Adrian Costina
b8ab2ff847
fmcomms1: updated common project
...
- increased the DMA FIFOs to 64
- added axi slices to the source and destination for DMAs
- for microblaze systems, increade the ad9643 dma data width at destination
- removed sys_fmc_dma_clk and used the sys_200m_clk instead for DMA data transfer
2014-11-25 14:51:42 +02:00
Istvan Csomortani
2bd154ad59
xfest14_zed: Update project to 2014.2
2014-11-25 12:53:42 +02:00
Istvan Csomortani
a1e67a5912
ad9625x2_fmc: dmafifo address width now is an argument of the process
2014-11-24 19:22:18 +02:00
Istvan Csomortani
660424ef99
fmcomms6_fmc: Update interrupts
2014-11-24 18:23:35 +02:00
Istvan Csomortani
56aefb62ed
fmcomms6_fmc: Cosmetic changes
...
Delete trailing white spaces, and fix alignment.
2014-11-24 18:23:34 +02:00
Istvan Csomortani
68ac015825
daq1_fmcl: Fix GT lane number definitions
...
Update which fix issues caused by GT lane number parameters change. (commit f8e7796592
)
2014-11-24 18:23:33 +02:00
Istvan Csomortani
0ecfc14e95
daq1_fmc: Update interrupts.
2014-11-24 18:23:32 +02:00
Istvan Csomortani
9b104f1657
daq1_fmc: Get rid of the concat module inside the block design.
...
xl_concat just causing troubles, no need to use it, if not justified.
2014-11-24 18:23:30 +02:00
Istvan Csomortani
64b4d0177e
ad9467_zed: Using ad_iobuf module for IO buffer instantiations on top
...
No functional changes, we just try to keep consistency.
2014-11-24 18:23:29 +02:00
Istvan Csomortani
83c2eefea2
ad9467_fmc: Update interrupts
2014-11-24 18:23:28 +02:00
Istvan Csomortani
114406335d
ad9467_fmc: Connect dma controller directly to the HP port
2014-11-24 18:23:27 +02:00
Rejeesh Kutty
67065a3130
ad9680_eval: removed
2014-11-24 11:04:34 -05:00
Istvan Csomortani
76fb5d3da9
ad9625_vc707: dmafifo address width now is an argument of the process
2014-11-24 16:52:10 +02:00
Istvan Csomortani
1834cf6d38
adi_prcfg_project: Update the PR design flow
...
Optimization directive kept on default in the implementation flow.
2014-11-21 19:26:33 +02:00
Istvan Csomortani
83d79a6acf
fmcomms2_pr: Update system_project script for mitx
...
Bist logic is using the pnmon module for PRBS checking.
2014-11-21 19:23:12 +02:00
Istvan Csomortani
6517a94929
fmcomms2_pr: Update interrupts and iobuf
...
No functional changes, update to the new interrupt path, and change the
iobuf instantiation in order to keep consistency.
2014-11-21 19:22:03 +02:00
Istvan Csomortani
65588f1b67
fmcomms2_pr: Cosmetic changes of mitx system top.
2014-11-21 19:20:30 +02:00
Istvan Csomortani
84f8377beb
fmcjedadc1_vc707: Add support for linear flash interface
2014-11-21 19:19:21 +02:00
Istvan Csomortani
e8546b9c3b
fmcjesdadc1: Update interrupts for KC705 and VC707
2014-11-21 19:18:30 +02:00
Istvan Csomortani
b0f571ce0c
fmcjesdadc1: Fix parameter lane number for GT core
2014-11-21 19:17:29 +02:00
Istvan Csomortani
c0f4d7e2b5
mitx045_common: Definition file patch
...
In 2014.2 tool version, the way how a definition file needs to be applied is different
The command "apply_bd_automation" should be used, instead setting property PCW_IMPORT_BOARD_PRESET
In non-project mode (PR design flow), after creating the static design the type of the board is set.
NOTE: the definition file for mitx must be installed accordingly in order to get this work
See link: http://zedboard.org/support/documentation/2056
2014-11-21 19:14:37 +02:00
Istvan Csomortani
5e08e18022
ad9434_fmc: Update interrupts
2014-11-21 19:06:48 +02:00
Rejeesh Kutty
db004641d3
kcu105: dmafifo address width change
2014-11-20 09:28:03 -05:00
Rejeesh Kutty
cdd1408d3c
dmafifo: parameterized address width
2014-11-20 09:28:02 -05:00
Istvan Csomortani
2912372d6e
ad9625_fmc: Add support for AD-JESDCLOCK1-EBZ
...
Connect the SPARE_CLOCK_DUT pin to GPIO, this will be used to reset the AD9527.
The SPI interface for the clock chip is already integrated into the design.
2014-11-18 14:11:51 +02:00
Istvan Csomortani
bbf1f0c156
adi_project: Add board definition for mitx045
2014-11-18 10:05:57 +02:00
Istvan Csomortani
e3378cd6cb
mitx045_board_definition: revert old board definition file
...
Revert commit 4f6aa159b8
. Those changes won't solve the issue.
mitx045.xml is the supported version under 2013.4
2014-11-18 10:05:55 +02:00
Istvan Csomortani
6e194dbcc0
adv7511_ac701: Fix project source files definition
2014-11-18 10:05:54 +02:00
Istvan Csomortani
766589637e
prcfg_zc706: Update data width and project script
2014-11-18 10:05:53 +02:00
Istvan Csomortani
5c7e8eb926
prcfg_setup: Fix data width, delete invalid ILA configurations
2014-11-18 10:05:51 +02:00
Istvan Csomortani
bd57c2246e
prcfg: Increase the PR portion area in order to increase the DSP resource.
2014-11-18 10:05:49 +02:00
Istvan Csomortani
344f1bb539
adv7511_kc705: Fix project source definition
2014-11-18 10:05:48 +02:00
Adrian Costina
01b3495a81
fmcomms1: Updated ZC706 project to be compatible with util_wfifo and increased system_constr.xdc priority
2014-11-17 18:33:21 +02:00
Adrian Costina
20a3f322e7
fmcomms1: Updated zc702 project
...
- fixed timing constraints, increased system_constr.xdc priority
- used ad_iobuf
- updated interrupt system to latest implementation
2014-11-17 18:32:12 +02:00
Adrian Costina
adcd16d033
fmcomms1: Updated zed project
...
- fixed timing constraints
- used ad_iobuf
- updated interrupt system to latest implementation
2014-11-17 18:31:24 +02:00
Rejeesh Kutty
5d1a0a14bf
ad9625x2_fmc: dma fifo changes
2014-11-14 16:00:32 -05:00
Rejeesh Kutty
2eb80715e3
ad9625_fmc: dma fifo changes
2014-11-13 14:13:00 -05:00
Istvan Csomortani
eaacd4d49a
adi_project.tcl: Fix message severity (working solution)
...
Need to define the default/initial severity too.
2014-11-13 18:55:43 +02:00
Istvan Csomortani
4bcf338e9b
adi_project.tcl : Fix message severity
...
When message severity is set to 'error', need to do it quiet, other way the tool will stop after synthesis, complaining for previous errors.
2014-11-13 16:33:47 +02:00
Istvan Csomortani
5baa015246
kc705_base: Delete timing constraints
2014-11-13 16:30:37 +02:00
Rejeesh Kutty
3915f7d5f4
daq2: kcu105 dma-fifo changes
2014-11-12 15:25:13 -05:00
Rejeesh Kutty
d79e95b774
daq2: dma-fifo changes
2014-11-12 15:24:54 -05:00
Rejeesh Kutty
074662a622
dmafifo: common interface with fifo2s
2014-11-12 15:24:31 -05:00
Rejeesh Kutty
855919ee8e
plddr3: internal buswidth/clock conversion
2014-11-12 14:43:50 -05:00
Rejeesh Kutty
dbf5acde76
plddr3: internal buswidth/clock conversion
2014-11-12 14:43:49 -05:00
Rejeesh Kutty
c6af2696b3
plddr3: internal buswidth/clock conversion
2014-11-12 14:43:48 -05:00
Adrian Costina
ce92d49565
adv7511: Updated VC707 project to include linear flash
2014-11-12 11:46:01 +02:00
Istvan Csomortani
897f5e219d
ad9625_zc706: Update GT configuration
2014-11-11 19:25:30 +02:00
Istvan Csomortani
776a396141
adi_project.tcl: Add new message severity definition
...
Set "Parameter does not exist!" message severity to error.
2014-11-11 19:20:40 +02:00
Rejeesh Kutty
8147fa0eb6
fmcomms7: asymmetric no of lanes
2014-11-11 08:54:27 -05:00
Rejeesh Kutty
439cbecf7c
fmcomms7: asymmetric no of lanes
2014-11-11 08:54:26 -05:00
Rejeesh Kutty
b96a8d01c3
fmcomms7: asymmetric no of lanes
2014-11-11 08:54:25 -05:00
Paul Cercueil
97fa063341
fmcadc3: Fix pre-processing of ADC data
...
Signed-off-by: Paul Cercueil <paul.cercueil@analog.com>
2014-11-11 11:49:40 +01:00
Paul Cercueil
4ccece5c8d
fmcadc3: Add a chip-select decoder to support up to 7 devices
...
This is required for the fmcadc3 board as it features 7 chips all
connected to the same SPI bus (ad9528, ad9234 x2, ada4961 x4).
Signed-off-by: Paul Cercueil <paul.cercueil@analog.com>
2014-11-11 11:49:40 +01:00
Adrian Costina
05ed98f884
common: Updated common constratins for ac701, kc705, vc707, zc702
2014-11-11 12:35:44 +02:00
Rejeesh Kutty
c1268f089d
scripts: hp/mem updates
2014-11-10 15:06:20 -05:00
Rejeesh Kutty
3211964c2e
ad6676evb: added
2014-11-10 13:41:01 -05:00
Rejeesh Kutty
4c0d053055
fmcomms7: compilation fixes
2014-11-10 13:26:28 -05:00
Rejeesh Kutty
b85c552e43
fmcomms7: constraint updates
2014-11-10 13:26:27 -05:00
Rejeesh Kutty
87000d7a23
fmcomms7: board updates
2014-11-10 13:26:26 -05:00
Rejeesh Kutty
82048866dd
fmcomms7: initial updates
2014-11-10 13:26:25 -05:00
Rejeesh Kutty
c72a04cecf
fmcomms7: initial updates
2014-11-10 13:26:24 -05:00
Rejeesh Kutty
4d915d539f
fmcomms7: initial updates
2014-11-10 13:26:23 -05:00
Rejeesh Kutty
0560bd5f99
fmcomms7: initial updates
2014-11-10 13:26:21 -05:00
Rejeesh Kutty
cbcdf4a2aa
fmcomms7: initial updates
2014-11-10 13:26:20 -05:00
Rejeesh Kutty
1edef2b8ff
fmcomms7: initial updates
2014-11-10 13:26:19 -05:00
Rejeesh Kutty
12896c7624
fmcomms7: daq2 copy
2014-11-10 13:26:18 -05:00
Rejeesh Kutty
50ce2e30be
daq2: ila changes for kcu105 timing
2014-11-10 10:57:35 -05:00
Paul Cercueil
1d73adcbc4
fmcadc3: zc706: Allow to enable pairs of channels and sign-extend data
...
Signed-off-by: Paul Cercueil <paul.cercueil@analog.com>
2014-11-07 18:09:00 +01:00
Paul Cercueil
c33d3dd0af
fmcadc3: zc706: Connect DMA interrupt line
...
Signed-off-by: Paul Cercueil <paul.cercueil@analog.com>
2014-11-07 18:08:24 +01:00
Adrian Costina
ad08c62b36
fmcomms2: Updated zc702 project. Updated interrupts. Updated constraints
2014-11-07 14:01:55 +02:00
Adrian Costina
4e11e39956
fmcomms2: Updated zed project
...
- Updated interrupt system to the latest implementation
- Fixed constraints
2014-11-07 13:59:46 +02:00
Adrian Costina
962df53946
fmcomms2: Updated kc705 project to vivado 2014.2.
...
- Updated interrupt system to the latest implementation
- Fixed constraints
- Used ad_iobuf
2014-11-07 13:58:40 +02:00
Adrian Costina
db18ed4af2
fmcomms2: Updated ac701 project to vivado 2014.2.
...
- Updated interrupt system to the latest implementation
- Fixed constraints
- Used ad_iobuf
2014-11-07 13:56:00 +02:00
Adrian Costina
7e2a9ce569
fmcomms2: Updated base design interrupt system for microblaze
2014-11-07 13:54:43 +02:00
Adrian Costina
0ade2a5f67
fmcomms5: Updated project to vivado 2014.2. Updated interrupt system. Fixed constraints
2014-11-07 13:45:15 +02:00
Rejeesh Kutty
2d9a529ab8
kcu105: ddr - 800M
2014-11-06 16:50:37 -05:00
Rejeesh Kutty
abad8ddc28
ad9625x2: fix ila connection
2014-11-06 14:22:46 -05:00
Istvan Csomortani
a2a2552c60
ad9625_vc707: Update project to support linear flash interface
2014-11-06 15:01:58 +02:00
Istvan Csomortani
d55ddc4da5
ad9625_vc707: Delete SEG_axi_bram_ctl_mem memory segment
2014-11-06 15:01:12 +02:00
Istvan Csomortani
0ffb1095d9
Revert "ad9625_vc707: Fix source file definition"
...
This reverts commit 6c80d88a0c
.
2014-11-06 14:59:08 +02:00
Istvan Csomortani
6b7fccf56b
ad9625_fmc: Preserve the IRQ layout
2014-11-06 12:20:26 +02:00
Rejeesh Kutty
0425202da5
fmcadc3: compilation fixes
2014-11-05 11:59:10 -05:00
Adrian Costina
fcd015305c
ad9625x2_fmc: Updated vc707 project to include linear flash
2014-11-05 17:19:35 +02:00
Adrian Costina
4634a4f868
vc707: Added linear flash to the base design
2014-11-05 17:18:40 +02:00
acozma
f1c5173a12
motor_control: Renamed the project to motcon1_fmc
2014-11-05 09:51:18 +02:00
Paul Cercueil
0f1bc27e27
fmcadc3: Connect adc_dwr and dma_ready to ILAs
...
Signed-off-by: Paul Cercueil <paul.cercueil@analog.com>
2014-11-04 18:09:30 +01:00
Paul Cercueil
d7ba7a95a6
fmcadc3: Update to use latest DDR3_fifo IP
...
Signed-off-by: Paul Cercueil <paul.cercueil@analog.com>
2014-11-04 18:09:30 +01:00
Istvan Csomortani
6c80d88a0c
ad9625_vc707: Fix source file definition
...
The project using "p_sys_dmafifo" process, from sys_axi_dmafifo.tcl.
2014-11-04 15:21:25 +02:00
Rejeesh Kutty
80646a641b
ad9625x2_fmc: constraints order changes
2014-11-03 15:02:35 -05:00
Rejeesh Kutty
56e65f5926
ad9625x2_fmc: add dma fifo
2014-11-03 15:02:00 -05:00
Rejeesh Kutty
8c0782cb74
ad9625x2_fmc: constraints changes
2014-11-03 15:01:40 -05:00
Rejeesh Kutty
beee377fb7
ad9625x2_fmc: interrupts fix
2014-11-03 15:01:15 -05:00
Rejeesh Kutty
8e6cb2bad4
ad9625x2_fmc: dma fifo additions
2014-11-03 15:00:51 -05:00
Lars-Peter Clausen
7ad9340992
pmod_ad7175: Connect gain control pin
...
Connect the gain control pin to GPIO32 of the ZYNQ.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2014-11-03 15:00:02 +01:00
Paul Cercueil
4eea04cc9d
fmcadc3: zc706: Fix DMA enable connection
...
Signed-off-by: Paul Cercueil <paul.cercueil@analog.com>
2014-11-03 14:45:16 +01:00
Istvan Csomortani
57137df018
fmcjesdadc1_zc706: Interrupt update
2014-11-03 13:02:09 +02:00
Istvan Csomortani
4f815b99a1
kc705_base: Fix sys_concat_intc input connections
...
All the unused input pins need to be connected to ground.
2014-11-03 13:02:08 +02:00
Istvan Csomortani
8ef3eada7d
adv7511_ac701: Interrupt update
2014-11-03 13:02:07 +02:00
Istvan Csomortani
98b92c4bc1
adv7511_kc705: Interrupt update
2014-11-03 13:02:06 +02:00
Istvan Csomortani
0246a40e28
adv7511_vc707: Interrupt update
2014-11-03 13:02:05 +02:00
Istvan Csomortani
f7588131da
ac701_base: Interrupt update
2014-11-03 13:02:04 +02:00
Istvan Csomortani
b92636c6eb
kc705_base: Interrupt update
2014-11-03 13:02:03 +02:00
Adrian Costina
25f37ffce7
usdrx1: Added cpld configuration files
2014-11-03 12:54:54 +02:00
Rejeesh Kutty
99ad286c41
kcu105: adv7511 updates
2014-10-31 13:28:17 -04:00
Rejeesh Kutty
8ed9d10502
ad9625_fmc: disable sync
2014-10-31 13:05:18 -04:00
Adrian Costina
6f5a268909
fmcomms1: ZC706, updated project with latest constraints and interrupts
2014-10-31 17:59:56 +02:00
acozma
a84397d345
motor_control: Changed the encoder pins mapping.
2014-10-31 17:37:28 +02:00
acozma
356e1c7ac1
motor_control: Changed the encoder pins mapping.
2014-10-31 17:08:18 +02:00
Adrian Costina
3c78d8fe58
ad9265_fmc: Added correct fifo to ILA. Updated interrupts
2014-10-31 14:49:29 +02:00
Adrian Costina
6fac294b6f
fmcomms2: Updated zc706 project to new interrupt system
2014-10-31 14:15:29 +02:00
Istvan Csomortani
91ea11041d
prcfg_mitx045: Upgrade of the project script.
...
- the design using the common PN monitor
- the first implemented logic will be the qpsk, to get a better result
- cosmetic changes
2014-10-31 12:18:00 +02:00
Istvan Csomortani
e450e78f13
prcfg: Update design to Vivado 2014.2
2014-10-31 12:05:19 +02:00
Istvan Csomortani
860a7caa56
prcfg: dac and adc to dma interface width is 64
2014-10-31 12:04:34 +02:00
Istvan Csomortani
ea194755e1
prcfg: Upgrade the QPSK logic
...
Regenerate the qpsk logic, with the new HDL coder, and modify the design to support the new files.
2014-10-31 11:59:29 +02:00
Istvan Csomortani
16cdae3001
mitx045_base: Delete unnecessary timing constraints.
2014-10-31 11:50:49 +02:00
Istvan Csomortani
07673b673a
adv7511_mitx045: Interrupt update
2014-10-31 11:46:27 +02:00
Istvan Csomortani
67bec719f7
mitx045_base: Interrupt update
2014-10-31 11:45:33 +02:00
Paul Cercueil
b9f800ff65
fmcadc3: zc706: Fix connection to the system clock
...
Signed-off-by: Paul Cercueil <paul.cercueil@analog.com>
2014-10-31 11:06:16 +01:00
Rejeesh Kutty
21f99b1c97
daq2: remove ila for kcu105
2014-10-30 15:26:29 -04:00
Rejeesh Kutty
56859ad4c9
sys_dmafifo: use internal memory
2014-10-30 15:26:28 -04:00
Istvan Csomortani
5bd00df33a
adv7511_zc706: Interrupt update
2014-10-30 19:02:16 +02:00
Istvan Csomortani
d81484a6f3
adv7511_zed: Interrupt update
2014-10-30 19:01:17 +02:00
Istvan Csomortani
7ae003cf82
zed_base: Interrupt update
2014-10-30 19:00:05 +02:00
Istvan Csomortani
e0b7ef2f4f
scripts: Update scripts for PR design flow
...
+ Rewrite the pr_verify process, to improve verification time
+ Update the implementation flow: always the biggest logic will be implemented first, to achieve a better result
therefore force the tool to optimize the first logic with 'ExploreSequentialArea'
+ Make utilization report just from the PR pblock, that's more relevant as the utilization report of the whole fabric
2014-10-30 18:51:13 +02:00
Istvan Csomortani
02b32abefe
adv7511_zc702: Interrupt update
2014-10-30 18:42:14 +02:00
Istvan Csomortani
ba53e156e3
ZC702_base: Interrupt update
2014-10-30 18:39:49 +02:00
Rejeesh Kutty
f595b86576
kcu105: lutram constraints for ies
2014-10-30 11:20:27 -04:00
Rejeesh Kutty
d0a70380bf
kcu105: lutram constraints for ies
2014-10-30 11:19:55 -04:00
Rejeesh Kutty
4c0e4d280f
dmafifo: internal version- light duty
2014-10-30 11:12:13 -04:00
Rejeesh Kutty
360e7104b6
dmafifo: axi version- heavy duty
2014-10-30 11:12:12 -04:00
Michael Hennerich
cfa1a93441
Merge branch 'dev' of https://github.com/analogdevicesinc/hdl into dev
2014-10-30 08:42:09 +01:00
Adrian Costina
56374cf592
usdrx1: Added synchronization, updated constraints, added timing check for a5gt project
2014-10-29 19:29:42 +02:00
Lars-Peter Clausen
cc265b6b9c
daq2/daq3/ad9625_fmc: Connect ADC DMA xfer_req signal
...
For proper operation the xfer_req signal needs to be connected from the ADC DMA to the DDR FIFO.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2014-10-29 18:15:54 +01:00
Adrian Costina
8c789104a6
ad9671: Fixed constraints. Modified system_timing.tcl so that it will fail if timing are not met
2014-10-29 18:25:56 +02:00
Rejeesh Kutty
2e01ad2eec
ad9625_fmc/zc706: ps7 interrupt updates
2014-10-29 12:13:44 -04:00
Michael Hennerich
b7946febfa
Merge branch 'dev' of https://github.com/analogdevicesinc/hdl into dev
2014-10-29 08:50:51 +01:00
Rejeesh Kutty
f83622a2e6
daq2/kcu105: interrupt updates
2014-10-28 15:51:42 -04:00
Rejeesh Kutty
4788d09620
vc707: interrupt updates
2014-10-28 15:42:55 -04:00
Rejeesh Kutty
c9691fac64
ad9625_fmc: merge zc706 and vc707
2014-10-28 10:12:19 -04:00
Rejeesh Kutty
627da6161b
ad9625_fmc: remove dma clock for now - zynq/non-zynq merge
2014-10-28 10:12:18 -04:00
acozma
36c7034bd6
ad7175: Fix dma issues
2014-10-28 16:00:06 +02:00
acozma
9e1d1c1b49
ad7175: Updated the AD7175 IP and project
2014-10-28 14:28:38 +02:00
Rejeesh Kutty
fd66affa42
scripts: add default memory interconnect
2014-10-27 15:53:20 -04:00
Rejeesh Kutty
fc4e002150
scripts: add mb cpu side
2014-10-27 15:53:19 -04:00
Istvan Csomortani
4f15f5c34c
adv7511: Update interrupts.
...
The ad_interrupts.v was used to concatenate the interrupts.
2014-10-27 19:48:05 +02:00
Istvan Csomortani
a870603db5
common_bd: Update the common block designs to the new IRQ path
...
Avoid the use of xil_concat module by using the ad_interrupts.
2014-10-27 19:44:25 +02:00
Adrian Costina
d04a545a41
fmcomms2: updated zc706 project with new constraint style
2014-10-27 19:27:36 +02:00
Rejeesh Kutty
61c769e035
kc705: daq2 updates
2014-10-27 09:59:57 -04:00
Rejeesh Kutty
d1e3993bd0
kcu105: daq2 updates
2014-10-27 09:59:56 -04:00
Rejeesh Kutty
d471b61f3e
fifo: merge zynq and non-zynq
2014-10-27 09:59:54 -04:00
Rejeesh Kutty
8b4d70eac6
daq2: merge zc706 and kcu105
2014-10-27 09:59:53 -04:00
Rejeesh Kutty
54f341fad8
scripts: sdk export before timing check
2014-10-27 09:59:52 -04:00
Rejeesh Kutty
4494998940
scripts: ignore another variant of reset warning
2014-10-27 09:59:51 -04:00
Istvan Csomortani
10b898a62d
zed_base: Fix IRQ layout.
...
Just a temporally fix of IRQ layout.
2014-10-27 14:46:26 +02:00
Istvan Csomortani
3645139e59
fmcomms6: Avoiding redefinition of system clocks.
2014-10-23 12:55:56 +03:00
Istvan Csomortani
dd5d57843d
fmcomms6: Update version of the ILA core
2014-10-23 12:30:55 +03:00
Istvan Csomortani
3dbfa8cda6
ad9434_fmc: Fix PN monitor and device interrupt
2014-10-23 11:29:14 +03:00
acozma
24e11b30b9
ad7175_zed: added the ad7175 ZED project
2014-10-23 06:15:17 +03:00
Rejeesh Kutty
20d59ce39b
daq2: dma fifo modifications
2014-10-22 16:39:28 -04:00
Rejeesh Kutty
4eeb50114f
daq2: rebase conflicts
2014-10-22 16:39:17 -04:00
Rejeesh Kutty
43cdafe1e2
kcu105: iic-rstn removed
2014-10-22 16:33:52 -04:00
Michael Hennerich
43fe20d141
Merge branch 'dev' of https://github.com/analogdevicesinc/hdl into dev
2014-10-22 17:19:37 +02:00
Istvan Csomortani
dcdba475f7
vc707_common: Fix net name sys_100m_resetn
2014-10-22 15:41:36 +03:00
Adrian Costina
a0d27a117c
usdrx1: Updated project with new synchronization mechanism. Fixed timing constraints
2014-10-22 13:20:44 +03:00
Adrian Costina
cd9033296c
ad9671_fmc: Fixed constraint files
2014-10-22 13:14:59 +03:00
Istvan Csomortani
17675863e0
all_projects: Fix the interrupt connections to preserve IRQ layout
2014-10-22 11:48:08 +03:00
Istvan Csomortani
767179dce9
adv7511_zc706: Fix IRQ layout
...
Fix IRQ connection, this layout works on Linux
2014-10-21 17:44:28 +03:00
Michael Hennerich
2beaeb9176
projects/daq2/kcu105/system_constr.xdc: temp constrains
...
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
2014-10-21 15:03:55 +02:00
Michael Hennerich
8a4ab4e05a
projects/ad9434_fmc/common/ad9434_bd.tcl: Fix freeze - Design doesn't use SYNC
...
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
2014-10-21 15:03:55 +02:00
Rejeesh Kutty
d4a21d9775
ad9625_fmc: constraints fix
2014-10-20 10:00:39 -04:00
Istvan Csomortani
b3c784f76a
ad9467_fmc: Made some cosmetic changes on the block design script.
2014-10-20 13:28:34 +03:00
Istvan Csomortani
4b8720b551
fmcomms2_zc706: Remove top level constraints
...
Remove all the unnecessary top level constraint definitions.
2014-10-20 13:25:01 +03:00
Istvan Csomortani
7115864b4c
ad9434_fmc: Remove top level constraints
...
Remove all the unnecessary top level constraint definitions.
2014-10-20 13:23:37 +03:00
Istvan Csomortani
5deffd57b1
zed: Remove top level constraints
...
Remove top level constraints from the ZED base design.
2014-10-20 13:20:27 +03:00
Istvan Csomortani
0c56e5b912
ad9434_fmc: Fix GPIO width
...
GPIO port width is 15 instead of 32
2014-10-20 10:59:30 +03:00
Rejeesh Kutty
7f8270d74b
ad9625_fmc: generic dma fifo for zynq and non-zynq boards
2014-10-17 14:38:16 -04:00
Rejeesh Kutty
0b30f98640
ad9625_fmc/zc706: remove top level constraints
2014-10-17 14:38:15 -04:00
Rejeesh Kutty
f3c9627cae
adi_project: demote reset warnings to info
2014-10-17 14:38:13 -04:00
Rejeesh Kutty
14ccdaaa78
kcu105: removed spdif reset
2014-10-17 14:00:00 -04:00
Rejeesh Kutty
380eeec013
daq2/kcu105: ethernet fix
2014-10-17 13:48:35 -04:00
Rejeesh Kutty
fca0714478
adv7511/kcu105: ethernet fix
2014-10-17 13:48:33 -04:00
Rejeesh Kutty
e73b3b52dc
kcu105: ethernet fix
2014-10-17 13:47:50 -04:00
Rejeesh Kutty
2600b1f359
daq3: tx interleave and dma fifo axi streaming
2014-10-15 14:51:04 -04:00
Rejeesh Kutty
6d76e0b768
zc706: remove top level constraints
2014-10-15 14:51:02 -04:00
Rejeesh Kutty
5715c5b28f
dmafifo: axi stream interface
2014-10-15 14:50:57 -04:00
Rejeesh Kutty
0aed11fa6c
adi_project: demote useless warnings
2014-10-15 14:50:54 -04:00
Lars-Peter Clausen
4d4a7981f2
fmcomms1: Connect DMA controller directly to the HP ports
...
The AXI DMAC controller nativly supports AXI3, there is no need to insert a interconnect to do protocol conversion.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2014-10-15 18:46:07 +03:00
Lars-Peter Clausen
7d3be14ab5
common: Connect audio clkgen reset
...
While we are at it also hide the unused locked pin.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2014-10-15 18:44:46 +03:00
Lars-Peter Clausen
fd89458708
common: Set cpu interconnect strategy to minimize area
...
There will rarely be concurrent access to the peripheral control bus
interconnect, so there is no need to optimize for performace. Setting the
interconnect strategy to minimize area can reduce the resource usage by
~90%.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2014-10-15 18:43:54 +03:00
Istvan Csomortani
d2a04856a9
common: Fix xlconstant output pin name
...
On 2014.2 xlconstant output pin name is 'dout'.
2014-10-15 15:37:06 +03:00
Istvan Csomortani
02802644bf
fmcjesdadc1: Fix a few warning and issue with ILA
...
+ GPIO width is 15
+ Fix ILA core
2014-10-15 15:37:05 +03:00
Adrian Costina
865cbab3a2
ad9671_fmc: Updated a5gt project with start of frame information
2014-10-15 10:53:33 +03:00
Adrian Costina
8934a66013
usdrx1: Update project so that the AD9671 cores can be synchronized
2014-10-13 17:06:40 +03:00
Istvan Csomortani
f528873fa9
fmcomms2: Add an additional SPI interface for up/down converter board
...
Supported carriers are: ZC706, ZC702 and Zed.
2014-10-10 18:47:07 +03:00
Istvan Csomortani
ca4c961891
fmcomms2: Use ad_iobuf instance on system_top
...
Use ad_iobuf instance on system top, instead of separate IOBUF instances.
2014-10-10 18:45:39 +03:00
Istvan Csomortani
e21d26e456
fmcomms2: Cosmetic changes
...
Get rid of unwanted whitespaces.
2014-10-10 18:25:17 +03:00
Istvan Csomortani
fe8a076b2e
fmcomms2: Cosmetic changes on *_bd.tcl script
2014-10-10 17:06:32 +03:00
Lars-Peter Clausen
7a9e694446
fmcomms2: Connect DMA directly to the HP ports
...
The DMA controller is able to send AXI3 compatible requests, no need to add
a interconnect for protocol conversion in between the DMA controller and the
HP port.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2014-10-10 16:25:14 +03:00
Lars-Peter Clausen
87047fd83e
fmcomms2: Set dac_unpack channels to 4
...
There are only 4 DAC channels in the fmcomms2 design, so set the number of
channels of the dac_unpack core to 4. This slightly reduces resource usage
as well as reducing the DMA alignment requirement from 128bit to 64bit. The
later value is what existing applications expect the alignement requirement
to be.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2014-10-10 16:25:06 +03:00
Lars-Peter Clausen
43e9b0c7a6
common: Disable TTC0 MMIO routing for PS7
...
We do not use the ttc0 to MMIO routing, but it is enabled by default, so
explicitly disable it.
2014-10-10 16:19:51 +03:00
Istvan Csomortani
e361bbbd04
Revert "fmcomms2_udc: Initial check in"
...
This reverts commit ddc7c845e9
.
2014-10-10 14:48:55 +03:00
Paul Cercueil
7659f3438c
AD9467: Fixup swapped net names
...
Signed-off-by: Paul Cercueil <paul.cercueil@analog.com>
2014-10-10 12:33:07 +03:00
Rejeesh Kutty
adf4893a27
usdrx1: remove constraints and other changes
2014-10-09 15:25:08 -04:00
Istvan Csomortani
ddc7c845e9
fmcomms2_udc: Initial check in
...
FMCOMMS2 with an additional SPI port for the up/down converter board
2014-10-09 19:01:22 +03:00
Istvan Csomortani
6f77af4aff
fmcjesdadc1: Upgrade project to 2014.2
2014-10-09 18:55:27 +03:00
Istvan Csomortani
2da395926e
fmcomms2: Upgrade project to 2014.2
2014-10-09 18:54:33 +03:00
Istvan Csomortani
4f6aa159b8
mitx045: Base design now support 2014.2
2014-10-09 15:11:28 +03:00
Adrian Costina
edeeafa47d
ad9671_fmc: Added sof information to the AD9671 driver
2014-10-09 14:52:25 +03:00
Istvan Csomortani
072e11c661
ad9467_fmc: Upgrade the axi_quad_spi core
2014-10-08 15:22:58 +03:00
Istvan Csomortani
fc38249150
ad9467 ZED: Fix over range signal path, and the dma interface.
2014-10-08 11:24:44 +03:00
Istvan Csomortani
15db557bd6
ad9467 ZED: Cosmetic changes on bd script.
2014-10-08 11:24:32 +03:00
Istvan Csomortani
82717b354a
ad9467_fmc : Upgrade project to 2014.2
2014-10-08 11:21:43 +03:00
Istvan Csomortani
b2d0260130
ad9467_fmc: Prevent to use concatenation module on SPI interface
...
This module cause unnecessary issues during version upgrades.
2014-10-08 11:20:45 +03:00
Rejeesh Kutty
27153fff41
ad9625x2_fmc: updated to 2014.2
2014-10-07 16:05:09 -04:00
Adrian Costina
2dfcb0c599
usdrx1: Initial commit for a5gt
...
axi_ad9671: added start of frame information to the altera core.
2014-10-07 19:41:54 +03:00
Istvan Csomortani
95842b8949
ad9434_fmc: Fix adc_valid signal path
2014-10-07 18:02:33 +03:00
Istvan Csomortani
115f33b8d6
ad9434_fmc: Fix pin constraints for ZC706
2014-10-07 17:58:29 +03:00
Istvan Csomortani
c1213ffe71
ad9434_fmc: Fix SPI interface
2014-10-07 17:51:14 +03:00
Michael Hennerich
cd42345324
projects/common/xxx/xxx_system_bd.tcl: 'Update microblaze defaults
...
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
2014-10-07 09:17:24 +02:00
Rejeesh Kutty
bca8ec0160
daq2: 2014.2 and ver.d
2014-10-06 14:56:01 -04:00
Rejeesh Kutty
c375b5b26e
daq3: vivado build
2014-10-06 10:34:02 -04:00
Rejeesh Kutty
525373fc04
daq3: daq2 copy
2014-10-06 10:34:00 -04:00
Rejeesh Kutty
210da4116f
scripts: initial commit
2014-10-03 16:13:34 -04:00
Rejeesh Kutty
f0927afd0b
ad9625_fmc: add dma fifo for non-zynq
2014-10-01 14:51:14 -04:00
Adrian Costina
89964be59e
fmcomms1: Updated project to vivado 2014.2
2014-09-30 10:32:18 +03:00
Adrian Costina
041d8faaf7
common: Updated common projects for ac701/kc702/zc702/zed to vivado 2014.2
2014-09-30 10:31:00 +03:00
Rejeesh Kutty
922bc6f03a
fmcadc3: 16bit - but ignored 4 lsb(s)
2014-09-29 15:26:30 -04:00
Adrian Costina
3c25c1171d
fmcomms1: Fixed missing sample issue on ZC706. Added modifications for all other platforms
2014-09-26 10:28:07 -04:00
Istvan Csomortani
87c4c73e22
ad9434: Fix adc_clk constraint
...
ADC clock is 500 Mhz.
2014-09-25 16:54:06 +03:00
Istvan Csomortani
82ed885b53
ad9434: Fix SPI line physical constraints
...
SPI lines are not differential.
2014-09-25 16:53:16 +03:00
Istvan Csomortani
ccb0b135ca
ad9434: Fix the adc to dma interface.
...
All the device2dma interfaces needs to have a generic form : (data, enable, valid)/channel
2014-09-25 16:50:09 +03:00
Istvan Csomortani
683561b67d
AD9434: Initial check in of the library and project with ZC706
2014-09-24 18:27:17 +03:00
Adrian Costina
1d4bc47cea
ad9265: Initial commit
2014-09-23 22:51:42 -04:00
acostina
296983707b
usdrx1: Updated project to 2014.2
2014-09-23 22:45:50 -04:00
acostina
5af2474d51
usdrx1: axi_ad9671 / axi_jesd_gt added signal for frame synchronization
2014-09-23 22:44:33 -04:00
Adrian Costina
bdf01738a1
ultrasound: disconnected ADN4670 chips from SPI lines.
...
Connected everything to ground so that the the clock selected is 0 and all outputs are enabled
2014-09-23 22:30:42 -04:00
Adrian Costina
7e40f99fe9
fmcomms2: Improved constraints for ac701 and zc702. Fixed common design so that ILA works correctly on microblaze based systems
2014-09-23 22:28:27 -04:00
Rejeesh Kutty
577441bd0c
daq1: clean up dma interfaces
2014-09-23 14:23:41 -04:00
Rejeesh Kutty
7c98a783c5
2014.2 updates
2014-09-23 12:32:33 -04:00
Rejeesh Kutty
1682d9da10
fmcadc3: initial updates
2014-09-22 11:27:17 -04:00
Rejeesh Kutty
5e3076d770
fmcadc3: daq2 copy
2014-09-22 11:27:16 -04:00
Istvan Csomortani
dd7bac41c1
daq1 : Update project to 2014.2
...
- Cores are upadted
- Concat module does not swap output anymore
- Clock signal name ps7_clk_* changed to clk_fpga_*
2014-09-22 17:33:50 +03:00