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jesd204/ad_ip_jesd204_tpl_adc: Make frame alignment opt-in feature

main
Laszlo Nagy 2021-02-22 09:18:51 +00:00 committed by Laszlo Nagy
parent 0db7519c18
commit fd714c181a
3 changed files with 9 additions and 0 deletions
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2
library/jesd204/ad_ip_jesd204_tpl_adc/ad_ip_jesd204_tpl_adc.v
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@ -36,6 +36,7 @@ module ad_ip_jesd204_tpl_adc #(
parameter BITS_PER_SAMPLE = 16, parameter BITS_PER_SAMPLE = 16,
parameter DMA_BITS_PER_SAMPLE = 16, parameter DMA_BITS_PER_SAMPLE = 16,
parameter OCTETS_PER_BEAT = 4, parameter OCTETS_PER_BEAT = 4,
parameter EN_FRAME_ALIGN = 1,
parameter TWOS_COMPLEMENT = 1 parameter TWOS_COMPLEMENT = 1
) ( ) (
// jesd interface // jesd interface
@ -177,6 +178,7 @@ module ad_ip_jesd204_tpl_adc #(
.BITS_PER_SAMPLE (BITS_PER_SAMPLE), .BITS_PER_SAMPLE (BITS_PER_SAMPLE),
.CONVERTER_RESOLUTION (CONVERTER_RESOLUTION), .CONVERTER_RESOLUTION (CONVERTER_RESOLUTION),
.SAMPLES_PER_FRAME (SAMPLES_PER_FRAME), .SAMPLES_PER_FRAME (SAMPLES_PER_FRAME),
.EN_FRAME_ALIGN (EN_FRAME_ALIGN),
.OCTETS_PER_BEAT (OCTETS_PER_BEAT), .OCTETS_PER_BEAT (OCTETS_PER_BEAT),
.LINK_DATA_WIDTH (LINK_DATA_WIDTH), .LINK_DATA_WIDTH (LINK_DATA_WIDTH),
.DMA_DATA_WIDTH (DMA_DATA_WIDTH), .DMA_DATA_WIDTH (DMA_DATA_WIDTH),

2
library/jesd204/ad_ip_jesd204_tpl_adc/ad_ip_jesd204_tpl_adc_core.v
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@ -31,6 +31,7 @@ module ad_ip_jesd204_tpl_adc_core #(
parameter BITS_PER_SAMPLE = 16, parameter BITS_PER_SAMPLE = 16,
parameter DMA_BITS_PER_SAMPLE = 16, parameter DMA_BITS_PER_SAMPLE = 16,
parameter OCTETS_PER_BEAT = 4, parameter OCTETS_PER_BEAT = 4,
parameter EN_FRAME_ALIGN = 0,
parameter DATA_PATH_WIDTH = 1, parameter DATA_PATH_WIDTH = 1,
parameter LINK_DATA_WIDTH = NUM_LANES * OCTETS_PER_BEAT * 8, parameter LINK_DATA_WIDTH = NUM_LANES * OCTETS_PER_BEAT * 8,
parameter DMA_DATA_WIDTH = DATA_PATH_WIDTH * DMA_BITS_PER_SAMPLE * NUM_CHANNELS, parameter DMA_DATA_WIDTH = DATA_PATH_WIDTH * DMA_BITS_PER_SAMPLE * NUM_CHANNELS,
@ -94,6 +95,7 @@ module ad_ip_jesd204_tpl_adc_core #(
.CONVERTER_RESOLUTION (CONVERTER_RESOLUTION), .CONVERTER_RESOLUTION (CONVERTER_RESOLUTION),
.SAMPLES_PER_FRAME (SAMPLES_PER_FRAME), .SAMPLES_PER_FRAME (SAMPLES_PER_FRAME),
.OCTETS_PER_BEAT (OCTETS_PER_BEAT), .OCTETS_PER_BEAT (OCTETS_PER_BEAT),
.EN_FRAME_ALIGN (EN_FRAME_ALIGN),
.LINK_DATA_WIDTH (LINK_DATA_WIDTH), .LINK_DATA_WIDTH (LINK_DATA_WIDTH),
.ADC_DATA_WIDTH (ADC_DATA_WIDTH) .ADC_DATA_WIDTH (ADC_DATA_WIDTH)
) i_deframer ( ) i_deframer (

5
library/jesd204/ad_ip_jesd204_tpl_adc/ad_ip_jesd204_tpl_adc_deframer.v
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@ -30,6 +30,7 @@ module ad_ip_jesd204_tpl_adc_deframer #(
parameter CONVERTER_RESOLUTION = 14, parameter CONVERTER_RESOLUTION = 14,
parameter SAMPLES_PER_FRAME = 1, parameter SAMPLES_PER_FRAME = 1,
parameter OCTETS_PER_BEAT = 8, parameter OCTETS_PER_BEAT = 8,
parameter EN_FRAME_ALIGN = 0,
parameter LINK_DATA_WIDTH = OCTETS_PER_BEAT * 8 * NUM_LANES, parameter LINK_DATA_WIDTH = OCTETS_PER_BEAT * 8 * NUM_LANES,
parameter ADC_DATA_WIDTH = LINK_DATA_WIDTH * CONVERTER_RESOLUTION / BITS_PER_SAMPLE parameter ADC_DATA_WIDTH = LINK_DATA_WIDTH * CONVERTER_RESOLUTION / BITS_PER_SAMPLE
) ( ) (
@ -102,6 +103,7 @@ module ad_ip_jesd204_tpl_adc_deframer #(
generate generate
genvar n; genvar n;
if (EN_FRAME_ALIGN) begin
for (n = 0; n < NUM_LANES; n = n + 1) begin: g_xcvr_if for (n = 0; n < NUM_LANES; n = n + 1) begin: g_xcvr_if
localparam DW = OCTETS_PER_BEAT * 8; localparam DW = OCTETS_PER_BEAT * 8;
ad_xcvr_rx_if #( ad_xcvr_rx_if #(
@ -114,6 +116,9 @@ module ad_ip_jesd204_tpl_adc_deframer #(
.rx_data (link_data_s[n*DW+:DW]) .rx_data (link_data_s[n*DW+:DW])
); );
end end
end else begin
assign link_data_s = link_data;
end
endgenerate endgenerate
endmodule endmodule