adi_project_intel: Update QSYS generation
In Quartus Prime in place of the set_domain_assignment command, the set_interconnect_requirement command is used.main
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b54effc9c9
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fa0b39fa20
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@ -134,9 +134,15 @@ proc adi_project {project_name {parameter_list {}}} {
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puts $QFILE "set_project_property DEVICE $device"
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puts $QFILE "set_project_property DEVICE $device"
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puts $QFILE "foreach {param value} {$parameter_list} { set ad_project_params(\$param) \$value }"
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puts $QFILE "foreach {param value} {$parameter_list} { set ad_project_params(\$param) \$value }"
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puts $QFILE "source system_qsys.tcl"
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puts $QFILE "source system_qsys.tcl"
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puts $QFILE "set_domain_assignment {\$system} {qsys_mm.maxAdditionalLatency} {4}"
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if {$quartus_pro_isused == 1} {
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puts $QFILE "set_domain_assignment {\$system} {qsys_mm.clockCrossingAdapter} {AUTO}"
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puts $QFILE "set_domain_assignment {\$system} {qsys_mm.maxAdditionalLatency} {4}"
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puts $QFILE "set_domain_assignment {\$system} {qsys_mm.burstAdapterImplementation} {PER_BURST_TYPE_CONVERTER}"
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puts $QFILE "set_domain_assignment {\$system} {qsys_mm.clockCrossingAdapter} {AUTO}"
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puts $QFILE "set_domain_assignment {\$system} {qsys_mm.burstAdapterImplementation} {PER_BURST_TYPE_CONVERTER}"
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} else {
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puts $QFILE "set_interconnect_requirement {\$system} {qsys_mm.maxAdditionalLatency} {4}"
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puts $QFILE "set_interconnect_requirement {\$system} {qsys_mm.clockCrossingAdapter} {AUTO}"
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puts $QFILE "set_interconnect_requirement {\$system} {qsys_mm.burstAdapterImplementation} {PER_BURST_TYPE_CONVERTER}"
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}
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puts $QFILE "save_system {system_bd.qsys}"
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puts $QFILE "save_system {system_bd.qsys}"
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close $QFILE
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close $QFILE
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