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axi_fifo: Slightly improve timing 

It is OK to overwrite invalid data with other invalid data.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
main
Lars-Peter Clausen 2014-04-07 10:58:17 +02:00
parent 4c9647f289
commit f9ca4fb8be
1 changed files with 6 additions and 2 deletions
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8
library/axi_fifo/axi_fifo.v
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@ -88,13 +88,17 @@ assign m_axis_valid = m_axis_raddr != m_axis_waddr;
assign s_axis_ready = s_axis_raddr == s_axis_waddr;
assign s_axis_empty = s_axis_raddr == s_axis_waddr;
always @(posedge s_axis_aclk) begin
if (s_axis_ready)
ram <= s_axis_data;
end
always @(posedge s_axis_aclk) begin
if (s_axis_aresetn == 1'b0) begin
s_axis_waddr <= 1'b0;
end else begin
if (s_axis_ready & s_axis_valid) begin
s_axis_waddr <= s_axis_waddr + 1'b1;
ram <= s_axis_data;
end
end
end
@ -179,7 +183,7 @@ always @(posedge m_axis_aclk) begin
end
always @(posedge m_axis_aclk) begin
if ((~valid || m_axis_ready) && _m_axis_valid)
if (~valid || m_axis_ready)
data <= ram[m_axis_raddr];
end