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pluto rev C hardware updates 

-connect axi_spi to board GPIOs
-connect axi IIC to board GPIOs

MIO49 SPI_CS   (PS MIO49)
L10P  SPI_MOSI (AXI_SPI)
L12N  SPI_MISO (AXI_SPI)
L24N  SPI_CLK  (AXI_SPI)
L7N   iic_sda  (AXI_IIC)
L9N   iic_scl  (AXI_IIC)
main
AndreiGrozav 2020-01-10 13:42:57 +02:00 committed by AndreiGrozav
parent e773b22087
commit f9c8ff26cf
3 changed files with 62 additions and 12 deletions
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37
projects/pluto/system_bd.tcl
View File

@ -18,6 +18,14 @@ create_bd_port -dir I -from 16 -to 0 gpio_i
create_bd_port -dir O -from 16 -to 0 gpio_o
create_bd_port -dir O -from 16 -to 0 gpio_t
create_bd_port -dir O spi_csn_o
create_bd_port -dir I spi_csn_i
create_bd_port -dir I spi_clk_i
create_bd_port -dir O spi_clk_o
create_bd_port -dir I spi_sdo_i
create_bd_port -dir O spi_sdo_o
create_bd_port -dir I spi_sdi_i
# instance: sys_ps7
ad_ip_instance processing_system7 sys_ps7
@ -54,6 +62,13 @@ ad_ip_parameter sys_ps7 CONFIG.PCW_USB0_RESET_IO {MIO 52}
ad_ip_parameter sys_ps7 CONFIG.PCW_USB0_RESET_ENABLE 1
ad_ip_parameter sys_ps7 CONFIG.PCW_IRQ_F2P_INTR 1
ad_ip_parameter sys_ps7 CONFIG.PCW_IRQ_F2P_MODE REVERSE
ad_ip_parameter sys_ps7 CONFIG.PCW_MIO_0_PULLUP {enabled}
ad_ip_parameter sys_ps7 CONFIG.PCW_MIO_9_PULLUP {enabled}
ad_ip_parameter sys_ps7 CONFIG.PCW_MIO_10_PULLUP {enabled}
ad_ip_parameter sys_ps7 CONFIG.PCW_MIO_11_PULLUP {enabled}
ad_ip_parameter sys_ps7 CONFIG.PCW_MIO_48_PULLUP {enabled}
ad_ip_parameter sys_ps7 CONFIG.PCW_MIO_49_PULLUP {disabled}
ad_ip_parameter sys_ps7 CONFIG.PCW_MIO_53_PULLUP {enabled}
# DDR MT41K256M16 HA-125 (32M, 16bit, 8banks)
@ -76,6 +91,13 @@ ad_ip_parameter sys_rstgen CONFIG.C_EXT_RST_WIDTH 1
# system reset/clock definitions
# add external spi
ad_ip_instance axi_quad_spi axi_spi
ad_ip_parameter axi_spi CONFIG.C_USE_STARTUP 0
ad_ip_parameter axi_spi CONFIG.C_NUM_SS_BITS 1
ad_ip_parameter axi_spi CONFIG.C_SCK_RATIO 8
ad_connect sys_cpu_clk sys_ps7/FCLK_CLK0
ad_connect sys_200m_clk sys_ps7/FCLK_CLK1
ad_connect sys_cpu_reset sys_rstgen/peripheral_reset
@ -91,7 +113,7 @@ ad_connect gpio_o sys_ps7/GPIO_O
ad_connect gpio_t sys_ps7/GPIO_T
ad_connect fixed_io sys_ps7/FIXED_IO
# spi connections
# ps7 spi connections
ad_connect spi0_csn_2_o sys_ps7/SPI0_SS2_O
ad_connect spi0_csn_1_o sys_ps7/SPI0_SS1_O
@ -103,6 +125,17 @@ ad_connect spi0_sdo_i sys_ps7/SPI0_MOSI_I
ad_connect spi0_sdo_o sys_ps7/SPI0_MOSI_O
ad_connect spi0_sdi_i sys_ps7/SPI0_MISO_I
# axi spi connections
ad_connect sys_cpu_clk axi_spi/ext_spi_clk
ad_connect spi_csn_i axi_spi/ss_i
ad_connect spi_csn_o axi_spi/ss_o
ad_connect spi_clk_i axi_spi/sck_i
ad_connect spi_clk_o axi_spi/sck_o
ad_connect spi_sdo_i axi_spi/io0_i
ad_connect spi_sdo_o axi_spi/io0_o
ad_connect spi_sdi_i axi_spi/io1_i
# interrupts
ad_connect sys_concat_intc/dout sys_ps7/IRQ_F2P
@ -229,6 +262,7 @@ ad_connect axi_ad9361/dac_data_q1 GND
ad_cpu_interconnect 0x79020000 axi_ad9361
ad_cpu_interconnect 0x7C400000 axi_ad9361_adc_dma
ad_cpu_interconnect 0x7C420000 axi_ad9361_dac_dma
ad_cpu_interconnect 0x7C430000 axi_spi
ad_ip_parameter sys_ps7 CONFIG.PCW_USE_S_AXI_HP1 {1}
ad_connect sys_cpu_clk sys_ps7/S_AXI_HP1_ACLK
@ -257,5 +291,6 @@ ad_connect sys_cpu_resetn axi_ad9361_dac_dma/m_src_axi_aresetn
ad_cpu_interrupt ps-13 mb-13 axi_ad9361_adc_dma/irq
ad_cpu_interrupt ps-12 mb-12 axi_ad9361_dac_dma/irq
ad_cpu_interrupt ps-11 mb-11 axi_spi/ip2intc_irpt

5
projects/pluto/system_constr.xdc
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@ -59,7 +59,10 @@ set_property -dict {PACKAGE_PIN E11 IOSTANDARD LVCMOS18} [get_ports spi_clk]
set_property -dict {PACKAGE_PIN E13 IOSTANDARD LVCMOS18} [get_ports spi_mosi]
set_property -dict {PACKAGE_PIN F12 IOSTANDARD LVCMOS18} [get_ports spi_miso]
set_property -dict {PACKAGE_PIN K13 IOSTANDARD LVCMOS18} [get_ports gpio_bd]
set_property -dict {PACKAGE_PIN R10 IOSTANDARD LVCMOS18} [get_ports pl_spi_clk_o]
set_property -dict {PACKAGE_PIN M12 IOSTANDARD LVCMOS18} [get_ports pl_spi_miso]
set_property -dict {PACKAGE_PIN K13 IOSTANDARD LVCMOS18} [get_ports pl_spi_mosi]
set_property -dict {PACKAGE_PIN P8 IOSTANDARD LVCMOS18} [get_ports clk_out]
create_clock -name rx_clk -period 16.27 [get_ports rx_clk_in]

32
projects/pluto/system_top.v
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@ -63,8 +63,6 @@ module system_top (
inout iic_scl,
inout iic_sda,
inout gpio_bd,
input rx_clk_in,
input rx_frame_in,
input [11:0] rx_data_in,
@ -84,7 +82,11 @@ module system_top (
output spi_csn,
output spi_clk,
output spi_mosi,
input spi_miso);
input spi_miso,
output pl_spi_clk_o,
output pl_spi_mosi,
input pl_spi_miso);
// internal signals
@ -92,19 +94,19 @@ module system_top (
wire [16:0] gpio_o;
wire [16:0] gpio_t;
assign gpio_i[16:15] = gpio_o[16:15];
// instantiations
ad_iobuf #(.DATA_WIDTH(15)) i_iobuf (
.dio_t (gpio_t[14:0]),
.dio_i (gpio_o[14:0]),
.dio_o (gpio_i[14:0]),
.dio_p ({ gpio_bd, // 14:14
gpio_resetb, // 13:13
ad_iobuf #(.DATA_WIDTH(14)) i_iobuf (
.dio_t (gpio_t[13:0]),
.dio_i (gpio_o[13:0]),
.dio_o (gpio_i[13:0]),
.dio_p ({ gpio_resetb, // 13:13
gpio_en_agc, // 12:12
gpio_ctl, // 11: 8
gpio_status})); // 7: 0
assign gpio_i[16:14] = gpio_o[16:14];
system_wrapper i_system_wrapper (
.ddr_addr (ddr_addr),
.ddr_ba (ddr_ba),
@ -136,6 +138,7 @@ module system_top (
.rx_clk_in (rx_clk_in),
.rx_data_in (rx_data_in),
.rx_frame_in (rx_frame_in),
.spi0_clk_i (1'b0),
.spi0_clk_o (spi_clk),
.spi0_csn_0_o (spi_csn),
@ -145,6 +148,15 @@ module system_top (
.spi0_sdi_i (spi_miso),
.spi0_sdo_i (1'b0),
.spi0_sdo_o (spi_mosi),
.spi_clk_i(1'b0),
.spi_clk_o(pl_spi_clk_o),
.spi_csn_i(1'b1),
.spi_csn_o(),
.spi_sdi_i(pl_spi_miso),
.spi_sdo_i(1'b0),
.spi_sdo_o(pl_spi_mosi),
.tx_clk_out (tx_clk_out),
.tx_data_out (tx_data_out),
.tx_frame_out (tx_frame_out),