From f9c4283f45321caaafcc3e48f7235d454e8db695 Mon Sep 17 00:00:00 2001 From: Istvan Csomortani Date: Tue, 31 Mar 2020 09:27:22 +0100 Subject: [PATCH] stratix10soc: Initial commit of base design Note: Currently we have a engineering sample version 2 board. --- .../common/s10soc/s10soc_system_assign.tcl | 373 ++++++++++++++++++ projects/common/s10soc/s10soc_system_qsys.tcl | 323 +++++++++++++++ projects/scripts/adi_project_intel.tcl | 6 + 3 files changed, 702 insertions(+) create mode 100644 projects/common/s10soc/s10soc_system_assign.tcl create mode 100644 projects/common/s10soc/s10soc_system_qsys.tcl diff --git a/projects/common/s10soc/s10soc_system_assign.tcl b/projects/common/s10soc/s10soc_system_assign.tcl new file mode 100644 index 000000000..94e6c4972 --- /dev/null +++ b/projects/common/s10soc/s10soc_system_assign.tcl @@ -0,0 +1,373 @@ +# stratix10soc carrier defaults + +# clocks and resets + +set_location_assignment PIN_AW10 -to sys_clk ; ## 100 MHz +set_location_assignment PIN_BC15 -to fpga_resetn +set_instance_assignment -name IO_STANDARD "1.8 V" -to sys_clk +set_instance_assignment -name IO_STANDARD "1.8 V" -to fpga_resetn + +## 25 MHz on OOBE Daughter Card + +set_location_assignment PIN_B29 -to hps_ref_clk +set_instance_assignment -name IO_STANDARD "1.8V" -to hps_ref_clk + +# fpga-gpio motherboard (led/dpsw/button) + +set_location_assignment PIN_A24 -to fpga_gpio_led[0] +set_location_assignment PIN_F22 -to fpga_gpio_led[1] +set_location_assignment PIN_B24 -to fpga_gpio_led[2] +set_location_assignment PIN_E22 -to fpga_gpio_led[3] + +set_instance_assignment -name IO_STANDARD "1.8 V" -to fpga_gpio_led[0] +set_instance_assignment -name IO_STANDARD "1.8 V" -to fpga_gpio_led[1] +set_instance_assignment -name IO_STANDARD "1.8 V" -to fpga_gpio_led[2] +set_instance_assignment -name IO_STANDARD "1.8 V" -to fpga_gpio_led[3] + +set_location_assignment PIN_B23 -to fpga_gpio_dpsw[0] +set_location_assignment PIN_C23 -to fpga_gpio_dpsw[1] +set_location_assignment PIN_E23 -to fpga_gpio_dpsw[2] +set_location_assignment PIN_E24 -to fpga_gpio_dpsw[3] + +set_instance_assignment -name IO_STANDARD "1.8 V" -to fpga_gpio_dpsw[0] +set_instance_assignment -name IO_STANDARD "1.8 V" -to fpga_gpio_dpsw[1] +set_instance_assignment -name IO_STANDARD "1.8 V" -to fpga_gpio_dpsw[2] +set_instance_assignment -name IO_STANDARD "1.8 V" -to fpga_gpio_dpsw[3] + +set_location_assignment PIN_A26 -to fpga_gpio_btn[0] +set_location_assignment PIN_A25 -to fpga_gpio_btn[1] +set_location_assignment PIN_D23 -to fpga_gpio_btn[2] +set_location_assignment PIN_D24 -to fpga_gpio_btn[3] + +set_instance_assignment -name IO_STANDARD "1.8 V" -to fpga_gpio_btn[0] +set_instance_assignment -name IO_STANDARD "1.8 V" -to fpga_gpio_btn[1] +set_instance_assignment -name IO_STANDARD "1.8 V" -to fpga_gpio_btn[2] +set_instance_assignment -name IO_STANDARD "1.8 V" -to fpga_gpio_btn[3] + +# hps-emac OOBE daughter card + +set_location_assignment PIN_G28 -to hps_emac_rx_clk +set_location_assignment PIN_F30 -to hps_emac_rx_ctl +set_location_assignment PIN_F31 -to hps_emac_tx_clk +set_location_assignment PIN_R29 -to hps_emac_tx_ctl +set_location_assignment PIN_B34 -to hps_emac_rx[0] +set_location_assignment PIN_E31 -to hps_emac_rx[1] +set_location_assignment PIN_G29 -to hps_emac_rx[2] +set_location_assignment PIN_H28 -to hps_emac_rx[3] +set_location_assignment PIN_J28 -to hps_emac_tx[0] +set_location_assignment PIN_E28 -to hps_emac_tx[1] +set_location_assignment PIN_P29 -to hps_emac_tx[2] +set_location_assignment PIN_B32 -to hps_emac_tx[3] +set_location_assignment PIN_B28 -to hps_emac_mdc +set_location_assignment PIN_K31 -to hps_emac_mdio + +set_instance_assignment -name IO_STANDARD "1.8 V" -to hps_emac_rx_clk +set_instance_assignment -name IO_STANDARD "1.8 V" -to hps_emac_rx_ctl +set_instance_assignment -name IO_STANDARD "1.8 V" -to hps_emac_tx_clk +set_instance_assignment -name IO_STANDARD "1.8 V" -to hps_emac_tx_ctl +set_instance_assignment -name IO_STANDARD "1.8 V" -to hps_emac_rx[0] +set_instance_assignment -name IO_STANDARD "1.8 V" -to hps_emac_rx[1] +set_instance_assignment -name IO_STANDARD "1.8 V" -to hps_emac_rx[2] +set_instance_assignment -name IO_STANDARD "1.8 V" -to hps_emac_rx[3] +set_instance_assignment -name IO_STANDARD "1.8 V" -to hps_emac_tx[0] +set_instance_assignment -name IO_STANDARD "1.8 V" -to hps_emac_tx[1] +set_instance_assignment -name IO_STANDARD "1.8 V" -to hps_emac_tx[2] +set_instance_assignment -name IO_STANDARD "1.8 V" -to hps_emac_tx[3] +set_instance_assignment -name IO_STANDARD "1.8 V" -to hps_emac_mdc +set_instance_assignment -name IO_STANDARD "1.8 V" -to hps_emac_mdio + +set_instance_assignment -name CURRENT_STRENGTH "4ma" -to hps_emac_rx_clk +set_instance_assignment -name CURRENT_STRENGTH "8ma" -to hps_emac_rx_ctl +set_instance_assignment -name CURRENT_STRENGTH "4ma" -to hps_emac_tx_clk +set_instance_assignment -name CURRENT_STRENGTH "8ma" -to hps_emac_tx_ctl +set_instance_assignment -name CURRENT_STRENGTH "8ma" -to hps_emac_tx[0] +set_instance_assignment -name CURRENT_STRENGTH "8ma" -to hps_emac_tx[1] +set_instance_assignment -name CURRENT_STRENGTH "8ma" -to hps_emac_tx[2] +set_instance_assignment -name CURRENT_STRENGTH "8ma" -to hps_emac_tx[3] +set_instance_assignment -name CURRENT_STRENGTH "4ma" -to hps_emac_mdc +set_instance_assignment -name CURRENT_STRENGTH "4ma" -to hps_emac_mdio + +set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to hps_emac_rx_clk +set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to hps_emac_rx_ctl +set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to hps_emac_tx_clk +set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to hps_emac_tx_ctl + +# hps-ddr4 mother board + +set_location_assignment PIN_M35 -to hps_ddr_ref_clk +set_location_assignment PIN_N35 -to "hps_ddr_ref_clk(n)" +set_location_assignment PIN_P34 -to hps_ddr_rzq +set_location_assignment PIN_K38 -to hps_ddr_a[0] +set_location_assignment PIN_L37 -to hps_ddr_a[1] +set_location_assignment PIN_M37 -to hps_ddr_a[2] +set_location_assignment PIN_M38 -to hps_ddr_a[3] +set_location_assignment PIN_J39 -to hps_ddr_a[4] +set_location_assignment PIN_J38 -to hps_ddr_a[5] +set_location_assignment PIN_K39 -to hps_ddr_a[6] +set_location_assignment PIN_L39 -to hps_ddr_a[7] +set_location_assignment PIN_P37 -to hps_ddr_a[8] +set_location_assignment PIN_R37 -to hps_ddr_a[9] +set_location_assignment PIN_N37 -to hps_ddr_a[10] +set_location_assignment PIN_P38 -to hps_ddr_a[11] +set_location_assignment PIN_P35 -to hps_ddr_a[12] +set_location_assignment PIN_K36 -to hps_ddr_a[13] +set_location_assignment PIN_K37 -to hps_ddr_a[14] +set_location_assignment PIN_N36 -to hps_ddr_a[15] +set_location_assignment PIN_P36 -to hps_ddr_a[16] +set_location_assignment PIN_H38 -to hps_ddr_act_n[0] +set_location_assignment PIN_A38 -to hps_ddr_alert_n[0] +set_location_assignment PIN_L36 -to hps_ddr_ba[0] +set_location_assignment PIN_T35 -to hps_ddr_ba[1] +set_location_assignment PIN_R36 -to hps_ddr_bg[0] +set_location_assignment PIN_F39 -to hps_ddr_ck[0] +set_location_assignment PIN_G39 -to hps_ddr_ck_n[0] +set_location_assignment PIN_L40 -to hps_ddr_cke[0] +set_location_assignment PIN_G38 -to hps_ddr_cs_n[0] +set_location_assignment PIN_G40 -to hps_ddr_odt[0] +set_location_assignment PIN_H40 -to hps_ddr_par[0] +set_location_assignment PIN_E40 -to hps_ddr_reset_n[0] +set_location_assignment PIN_A36 -to hps_ddr_dqs_p[0] +set_location_assignment PIN_E36 -to hps_ddr_dqs_p[1] +set_location_assignment PIN_G33 -to hps_ddr_dqs_p[2] +set_location_assignment PIN_L32 -to hps_ddr_dqs_p[3] +set_location_assignment PIN_T26 -to hps_ddr_dqs_p[4] +set_location_assignment PIN_V28 -to hps_ddr_dqs_p[5] +set_location_assignment PIN_J26 -to hps_ddr_dqs_p[6] +set_location_assignment PIN_E26 -to hps_ddr_dqs_p[7] +set_location_assignment PIN_R32 -to hps_ddr_dqs_p[8] +set_location_assignment PIN_A35 -to hps_ddr_dqs_n[0] +set_location_assignment PIN_F36 -to hps_ddr_dqs_n[1] +set_location_assignment PIN_G34 -to hps_ddr_dqs_n[2] +set_location_assignment PIN_L31 -to hps_ddr_dqs_n[3] +set_location_assignment PIN_R27 -to hps_ddr_dqs_n[4] +set_location_assignment PIN_V27 -to hps_ddr_dqs_n[5] +set_location_assignment PIN_K26 -to hps_ddr_dqs_n[6] +set_location_assignment PIN_F26 -to hps_ddr_dqs_n[7] +set_location_assignment PIN_T32 -to hps_ddr_dqs_n[8] +set_location_assignment PIN_C36 -to hps_ddr_dbi_n[0] +set_location_assignment PIN_D39 -to hps_ddr_dbi_n[1] +set_location_assignment PIN_F34 -to hps_ddr_dbi_n[2] +set_location_assignment PIN_J34 -to hps_ddr_dbi_n[3] +set_location_assignment PIN_N25 -to hps_ddr_dbi_n[4] +set_location_assignment PIN_V30 -to hps_ddr_dbi_n[5] +set_location_assignment PIN_L26 -to hps_ddr_dbi_n[6] +set_location_assignment PIN_E27 -to hps_ddr_dbi_n[7] +set_location_assignment PIN_U34 -to hps_ddr_dbi_n[8] +set_location_assignment PIN_A37 -to hps_ddr_dq[0] +set_location_assignment PIN_B35 -to hps_ddr_dq[1] +set_location_assignment PIN_D36 -to hps_ddr_dq[2] +set_location_assignment PIN_B37 -to hps_ddr_dq[3] +set_location_assignment PIN_B38 -to hps_ddr_dq[4] +set_location_assignment PIN_C35 -to hps_ddr_dq[5] +set_location_assignment PIN_C38 -to hps_ddr_dq[6] +set_location_assignment PIN_C37 -to hps_ddr_dq[7] +set_location_assignment PIN_H37 -to hps_ddr_dq[8] +set_location_assignment PIN_E39 -to hps_ddr_dq[9] +set_location_assignment PIN_F37 -to hps_ddr_dq[10] +set_location_assignment PIN_E38 -to hps_ddr_dq[11] +set_location_assignment PIN_D38 -to hps_ddr_dq[12] +set_location_assignment PIN_D34 -to hps_ddr_dq[13] +set_location_assignment PIN_D35 -to hps_ddr_dq[14] +set_location_assignment PIN_E37 -to hps_ddr_dq[15] +set_location_assignment PIN_H33 -to hps_ddr_dq[16] +set_location_assignment PIN_E34 -to hps_ddr_dq[17] +set_location_assignment PIN_F35 -to hps_ddr_dq[18] +set_location_assignment PIN_J36 -to hps_ddr_dq[19] +set_location_assignment PIN_G35 -to hps_ddr_dq[20] +set_location_assignment PIN_J35 -to hps_ddr_dq[21] +set_location_assignment PIN_H35 -to hps_ddr_dq[22] +set_location_assignment PIN_H36 -to hps_ddr_dq[23] +set_location_assignment PIN_K33 -to hps_ddr_dq[24] +set_location_assignment PIN_K34 -to hps_ddr_dq[25] +set_location_assignment PIN_M33 -to hps_ddr_dq[26] +set_location_assignment PIN_N32 -to hps_ddr_dq[27] +set_location_assignment PIN_K32 -to hps_ddr_dq[28] +set_location_assignment PIN_N33 -to hps_ddr_dq[29] +set_location_assignment PIN_N31 -to hps_ddr_dq[30] +set_location_assignment PIN_M34 -to hps_ddr_dq[31] +set_location_assignment PIN_U25 -to hps_ddr_dq[32] +set_location_assignment PIN_T25 -to hps_ddr_dq[33] +set_location_assignment PIN_P25 -to hps_ddr_dq[34] +set_location_assignment PIN_N27 -to hps_ddr_dq[35] +set_location_assignment PIN_L25 -to hps_ddr_dq[36] +set_location_assignment PIN_R26 -to hps_ddr_dq[37] +set_location_assignment PIN_P26 -to hps_ddr_dq[38] +set_location_assignment PIN_M25 -to hps_ddr_dq[39] +set_location_assignment PIN_U30 -to hps_ddr_dq[40] +set_location_assignment PIN_T30 -to hps_ddr_dq[41] +set_location_assignment PIN_T29 -to hps_ddr_dq[42] +set_location_assignment PIN_U28 -to hps_ddr_dq[43] +set_location_assignment PIN_V25 -to hps_ddr_dq[44] +set_location_assignment PIN_U27 -to hps_ddr_dq[45] +set_location_assignment PIN_V26 -to hps_ddr_dq[46] +set_location_assignment PIN_U29 -to hps_ddr_dq[47] +set_location_assignment PIN_M27 -to hps_ddr_dq[48] +set_location_assignment PIN_L27 -to hps_ddr_dq[49] +set_location_assignment PIN_G25 -to hps_ddr_dq[50] +set_location_assignment PIN_H25 -to hps_ddr_dq[51] +set_location_assignment PIN_H27 -to hps_ddr_dq[52] +set_location_assignment PIN_K27 -to hps_ddr_dq[53] +set_location_assignment PIN_H26 -to hps_ddr_dq[54] +set_location_assignment PIN_F25 -to hps_ddr_dq[55] +set_location_assignment PIN_G27 -to hps_ddr_dq[56] +set_location_assignment PIN_C27 -to hps_ddr_dq[57] +set_location_assignment PIN_B27 -to hps_ddr_dq[58] +set_location_assignment PIN_F27 -to hps_ddr_dq[59] +set_location_assignment PIN_C26 -to hps_ddr_dq[60] +set_location_assignment PIN_B25 -to hps_ddr_dq[61] +set_location_assignment PIN_D26 -to hps_ddr_dq[62] +set_location_assignment PIN_D25 -to hps_ddr_dq[63] +set_location_assignment PIN_T34 -to hps_ddr_dq[64] +set_location_assignment PIN_R31 -to hps_ddr_dq[65] +set_location_assignment PIN_U33 -to hps_ddr_dq[66] +set_location_assignment PIN_T31 -to hps_ddr_dq[67] +set_location_assignment PIN_R34 -to hps_ddr_dq[68] +set_location_assignment PIN_U32 -to hps_ddr_dq[69] +set_location_assignment PIN_V32 -to hps_ddr_dq[70] +set_location_assignment PIN_P33 -to hps_ddr_dq[71] + +# hps-usb0 OOBE daughter card + +set_location_assignment PIN_E29 -to hps_usb_clk +set_location_assignment PIN_A30 -to hps_usb_data[0] +set_location_assignment PIN_C32 -to hps_usb_data[1] +set_location_assignment PIN_A29 -to hps_usb_data[2] +set_location_assignment PIN_E33 -to hps_usb_data[3] +set_location_assignment PIN_F29 -to hps_usb_data[4] +set_location_assignment PIN_E32 -to hps_usb_data[5] +set_location_assignment PIN_B30 -to hps_usb_data[6] +set_location_assignment PIN_D29 -to hps_usb_data[7] +set_location_assignment PIN_D30 -to hps_usb_dir +set_location_assignment PIN_A27 -to hps_usb_nxt +set_location_assignment PIN_C33 -to hps_usb_stp + +set_instance_assignment -name IO_STANDARD "1.8V" -to hps_usb_clk +set_instance_assignment -name IO_STANDARD "1.8V" -to hps_usb_data[0] +set_instance_assignment -name IO_STANDARD "1.8V" -to hps_usb_data[1] +set_instance_assignment -name IO_STANDARD "1.8V" -to hps_usb_data[2] +set_instance_assignment -name IO_STANDARD "1.8V" -to hps_usb_data[3] +set_instance_assignment -name IO_STANDARD "1.8V" -to hps_usb_data[4] +set_instance_assignment -name IO_STANDARD "1.8V" -to hps_usb_data[5] +set_instance_assignment -name IO_STANDARD "1.8V" -to hps_usb_data[6] +set_instance_assignment -name IO_STANDARD "1.8V" -to hps_usb_data[7] +set_instance_assignment -name IO_STANDARD "1.8V" -to hps_usb_dir +set_instance_assignment -name IO_STANDARD "1.8V" -to hps_usb_nxt +set_instance_assignment -name IO_STANDARD "1.8V" -to hps_usb_stp + +set_instance_assignment -name CURRENT_STRENGTH "8ma" -to hps_usb_data[0] +set_instance_assignment -name CURRENT_STRENGTH "8ma" -to hps_usb_data[1] +set_instance_assignment -name CURRENT_STRENGTH "8ma" -to hps_usb_data[2] +set_instance_assignment -name CURRENT_STRENGTH "8ma" -to hps_usb_data[3] +set_instance_assignment -name CURRENT_STRENGTH "8ma" -to hps_usb_data[4] +set_instance_assignment -name CURRENT_STRENGTH "8ma" -to hps_usb_data[5] +set_instance_assignment -name CURRENT_STRENGTH "8ma" -to hps_usb_data[6] +set_instance_assignment -name CURRENT_STRENGTH "8ma" -to hps_usb_data[7] +set_instance_assignment -name CURRENT_STRENGTH "8ma" -to hps_usb_stp + +# hps-sdmmc OOBE daughter card + +set_location_assignment PIN_A31 -to hps_sdmmc_clk +set_location_assignment PIN_J30 -to hps_sdmmc_cmd +set_location_assignment PIN_P30 -to hps_sdmmc_data[0] +set_location_assignment PIN_H30 -to hps_sdmmc_data[1] +set_location_assignment PIN_D31 -to hps_sdmmc_data[2] +set_location_assignment PIN_H32 -to hps_sdmmc_data[3] + +set_instance_assignment -name IO_STANDARD "1.8V" -to hps_sdmmc_clk +set_instance_assignment -name IO_STANDARD "1.8V" -to hps_sdmmc_cmd +set_instance_assignment -name IO_STANDARD "1.8V" -to hps_sdmmc_data[0] +set_instance_assignment -name IO_STANDARD "1.8V" -to hps_sdmmc_data[1] +set_instance_assignment -name IO_STANDARD "1.8V" -to hps_sdmmc_data[2] +set_instance_assignment -name IO_STANDARD "1.8V" -to hps_sdmmc_data[3] + +set_instance_assignment -name CURRENT_STRENGTH "8ma" -to hps_sdmmc_clk +set_instance_assignment -name CURRENT_STRENGTH "8ma" -to hps_sdmmc_cmd +set_instance_assignment -name CURRENT_STRENGTH "8ma" -to hps_sdmmc_data[0] +set_instance_assignment -name CURRENT_STRENGTH "8ma" -to hps_sdmmc_data[1] +set_instance_assignment -name CURRENT_STRENGTH "8ma" -to hps_sdmmc_data[2] +set_instance_assignment -name CURRENT_STRENGTH "8ma" -to hps_sdmmc_data[3] + +# hps-uart0 OOBE daughter card + +set_location_assignment PIN_K29 -to hps_uart_rx +set_location_assignment PIN_F32 -to hps_uart_tx + +set_instance_assignment -name IO_STANDARD "1.8V" -to hps_uart_rx +set_instance_assignment -name IO_STANDARD "1.8V" -to hps_uart_tx +set_instance_assignment -name CURRENT_STRENGTH "8ma" -to hps_uart_rx +set_instance_assignment -name CURRENT_STRENGTH "8ma" -to hps_uart_tx + +# hps-gpio OOBE daughter card + +set_location_assignment PIN_G30 -to hps_gpio_eth_irq +set_location_assignment PIN_C28 -to hps_gpio_usb_oci +set_location_assignment PIN_A34 -to hps_gpio_btn[0] +set_location_assignment PIN_N30 -to hps_gpio_btn[1] +set_location_assignment PIN_D33 -to hps_gpio_led[0] +set_location_assignment PIN_J31 -to hps_gpio_led[1] +set_location_assignment PIN_D28 -to hps_gpio_led[2] + +set_instance_assignment -name IO_STANDARD "1.8V" -to hps_gpio_eth_irq +set_instance_assignment -name IO_STANDARD "1.8V" -to hps_gpio_usb_oci +set_instance_assignment -name IO_STANDARD "1.8V" -to hps_gpio_btn[0] +set_instance_assignment -name IO_STANDARD "1.8V" -to hps_gpio_btn[1] +set_instance_assignment -name IO_STANDARD "1.8V" -to hps_gpio_led[0] +set_instance_assignment -name IO_STANDARD "1.8V" -to hps_gpio_led[1] +set_instance_assignment -name IO_STANDARD "1.8V" -to hps_gpio_led[2] + +set_instance_assignment -name CURRENT_STRENGTH "2ma" -to hps_gpio_eth_irq +set_instance_assignment -name CURRENT_STRENGTH "2ma" -to hps_gpio_usb_oci +set_instance_assignment -name CURRENT_STRENGTH "2ma" -to hps_gpio_btn[0] +set_instance_assignment -name CURRENT_STRENGTH "2ma" -to hps_gpio_btn[1] +set_instance_assignment -name CURRENT_STRENGTH "2ma" -to hps_gpio_led[0] +set_instance_assignment -name CURRENT_STRENGTH "2ma" -to hps_gpio_led[1] +set_instance_assignment -name CURRENT_STRENGTH "2ma" -to hps_gpio_led[2] + +# hps-i2c OOBE daughter card + +set_location_assignment PIN_H31 -to hps_i2c_scl +set_location_assignment PIN_B33 -to hps_i2c_sda + +set_instance_assignment -name IO_STANDARD "1.8V" -to hps_i2c_scl +set_instance_assignment -name IO_STANDARD "1.8V" -to hps_i2c_sda +set_instance_assignment -name CURRENT_STRENGTH "4ma" -to hps_i2c_scl +set_instance_assignment -name CURRENT_STRENGTH "4ma" -to hps_i2c_sda + +# hps-jtag OOBE daughter card + +set_location_assignment PIN_K28 -to hps_jtag_tck +set_location_assignment PIN_A32 -to hps_jtag_tdi +set_location_assignment PIN_G32 -to hps_jtag_tdo +set_location_assignment PIN_J29 -to hps_jtag_tms + +set_instance_assignment -name IO_STANDARD "1.8V" -to hps_jtag_tck +set_instance_assignment -name IO_STANDARD "1.8V" -to hps_jtag_tdi +set_instance_assignment -name IO_STANDARD "1.8V" -to hps_jtag_tdo +set_instance_assignment -name IO_STANDARD "1.8V" -to hps_jtag_tms +set_instance_assignment -name CURRENT_STRENGTH "4ma" -to hps_jtag_tdo + +# Stratix 10 SOC development kit's global assignments + +set_global_assignment -name INI_VARS "ASM_ENABLE_ADVANCED_DEVICES=ON; hps_dump_handoff_data=on" +set_global_assignment -name USE_HPS_COLD_RESET SDM_IO12 +set_global_assignment -name HPS_INITIALIZATION "AFTER INIT_DONE" +set_global_assignment -name HPS_DAP_SPLIT_MODE "SDM PINS" +set_global_assignment -name VID_OPERATION_MODE "PMBUS MASTER" +set_global_assignment -name USE_PWRMGT_SCL SDM_IO0 +set_global_assignment -name USE_PWRMGT_SDA SDM_IO16 +set_global_assignment -name PWRMGT_BUS_SPEED_MODE "400 KHZ" +set_global_assignment -name PWRMGT_PAGE_COMMAND_ENABLE ON +set_global_assignment -name PWRMGT_SLAVE_DEVICE_TYPE OTHER +set_global_assignment -name PWRMGT_SLAVE_DEVICE0_ADDRESS 47 +set_global_assignment -name PWRMGT_SLAVE_DEVICE1_ADDRESS 00 +set_global_assignment -name PWRMGT_SLAVE_DEVICE2_ADDRESS 00 +set_global_assignment -name PWRMGT_SLAVE_DEVICE3_ADDRESS 00 +set_global_assignment -name PWRMGT_SLAVE_DEVICE4_ADDRESS 00 +set_global_assignment -name PWRMGT_SLAVE_DEVICE5_ADDRESS 00 +set_global_assignment -name PWRMGT_SLAVE_DEVICE6_ADDRESS 00 +set_global_assignment -name PWRMGT_SLAVE_DEVICE7_ADDRESS 00 +set_global_assignment -name PWRMGT_VOLTAGE_OUTPUT_FORMAT "AUTO DISCOVERY" +set_global_assignment -name PWRMGT_TRANSLATED_VOLTAGE_VALUE_UNIT VOLTS + +set_global_assignment -name DEVICE_INITIALIZATION_CLOCK OSC_CLK_1_125MHz + diff --git a/projects/common/s10soc/s10soc_system_qsys.tcl b/projects/common/s10soc/s10soc_system_qsys.tcl new file mode 100644 index 000000000..9e6f67804 --- /dev/null +++ b/projects/common/s10soc/s10soc_system_qsys.tcl @@ -0,0 +1,323 @@ +# stratix10soc carrier qsys + + +set system_type s10soc + +# clock & reset + +add_instance sys_clk clock_source +add_interface sys_clk clock sink +add_interface sys_rst reset sink +set_interface_property sys_clk EXPORT_OF sys_clk.clk_in +set_interface_property sys_rst EXPORT_OF sys_clk.clk_in_reset +set_instance_parameter_value sys_clk {clockFrequency} {100000000.0} +set_instance_parameter_value sys_clk {clockFrequencyKnown} {1} +set_instance_parameter_value sys_clk {resetSynchronousEdges} {DEASSERT} + +##add_instance sys_clk altera_clock_bridge 19.1 +##set_instance_parameter_value sys_clk {EXPLICIT_CLOCK_RATE} {100000000.0} +##set_instance_parameter_value sys_clk {NUM_CLOCK_OUTPUTS} {1} +##add_interface sys_clk clock sink +##set_interface_property sys_clk EXPORT_OF sys_clk.in_clk +## +##add_instance sys_resetn altera_reset_bridge 19.1 +##set_instance_parameter_value sys_resetn {ACTIVE_LOW_RESET} {1} +##add_connection sys_clk.out_clk sys_resetn.clk +##add_interface sys_rstn reset sink +##set_interface_property sys_rstn EXPORT_OF sys_resetn.in_reset + +add_instance s10_reset altera_s10_user_rst_clkgate +add_interface rst_ninit_done reset source +set_interface_property rst_ninit_done EXPORT_OF s10_reset.ninit_done + +# sysid + +add_instance sys_id altera_avalon_sysid_qsys +set_instance_parameter_value sys_id {ID} {0x00000100} +add_connection sys_clk.clk sys_id.clk +add_connection sys_clk.clk_reset sys_id.reset + +# hps +# round-about way - qsys-script doesn't support {*}? + +variable hps_io_list + +proc set_hps_io {io_index io_type} { + + global hps_io_list + lappend hps_io_list $io_type +} + +set_hps_io IO_SHARED_Q1_1 USB0:CLK +set_hps_io IO_SHARED_Q1_2 USB0:STP +set_hps_io IO_SHARED_Q1_3 USB0:DIR +set_hps_io IO_SHARED_Q1_4 USB0:DATA0 +set_hps_io IO_SHARED_Q1_5 USB0:DATA1 +set_hps_io IO_SHARED_Q1_6 USB0:NXT +set_hps_io IO_SHARED_Q1_7 USB0:DATA2 +set_hps_io IO_SHARED_Q1_8 USB0:DATA3 +set_hps_io IO_SHARED_Q1_9 USB0:DATA4 +set_hps_io IO_SHARED_Q1_10 USB0:DATA5 +set_hps_io IO_SHARED_Q1_11 USB0:DATA6 +set_hps_io IO_SHARED_Q1_12 USB0:DATA7 +set_hps_io IO_SHARED_Q2_1 EMAC0:TX_CLK +set_hps_io IO_SHARED_Q2_2 EMAC0:TX_CTL +set_hps_io IO_SHARED_Q2_3 EMAC0:RX_CLK +set_hps_io IO_SHARED_Q2_4 EMAC0:RX_CTL +set_hps_io IO_SHARED_Q2_5 EMAC0:TXD0 +set_hps_io IO_SHARED_Q2_6 EMAC0:TXD1 +set_hps_io IO_SHARED_Q2_7 EMAC0:RXD0 +set_hps_io IO_SHARED_Q2_8 EMAC0:RXD1 +set_hps_io IO_SHARED_Q2_9 EMAC0:TXD2 +set_hps_io IO_SHARED_Q2_10 EMAC0:TXD3 +set_hps_io IO_SHARED_Q2_11 EMAC0:RXD2 +set_hps_io IO_SHARED_Q1_12 EMAC0:RXD3 +set_hps_io IO_SHARED_Q3_1 GPIO +set_hps_io IO_SHARED_Q3_2 GPIO +set_hps_io IO_SHARED_Q3_3 UART0:TX +set_hps_io IO_SHARED_Q3_4 UART0:RX +set_hps_io IO_SHARED_Q3_5 GPIO +set_hps_io IO_SHARED_Q3_6 GPIO +set_hps_io IO_SHARED_Q3_7 I2C1:SDA +set_hps_io IO_SHARED_Q3_8 I2C1:SCL +set_hps_io IO_SHARED_Q3_9 JTAG:TCK +set_hps_io IO_SHARED_Q3_10 JTAG:TMS +set_hps_io IO_SHARED_Q3_11 JTAG:TDO +set_hps_io IO_SHARED_Q3_12 JTAG:TDI +set_hps_io IO_SHARED_Q4_1 SDMMC:D0 +set_hps_io IO_SHARED_Q4_2 SDMMC:CMD +set_hps_io IO_SHARED_Q4_3 SDMMC:CCLK +set_hps_io IO_SHARED_Q4_4 SDMMC:D1 +set_hps_io IO_SHARED_Q4_5 SDMMC:D2 +set_hps_io IO_SHARED_Q4_6 SDMMC:D3 +set_hps_io IO_SHARED_Q4_7 HPS_OSC_CLK +set_hps_io IO_SHARED_Q4_8 GPIO +set_hps_io IO_SHARED_Q4_9 GPIO +set_hps_io IO_SHARED_Q4_10 GPIO +set_hps_io IO_SHARED_Q4_11 MDIO0:MDIO +set_hps_io IO_SHARED_Q4_12 MDIO0:MDC + +add_instance sys_hps altera_stratix10_hps +set_instance_parameter_value sys_hps {CLK_PERI_PLL_SOURCE2} {0} +set_instance_parameter_value sys_hps {CLK_PSI_SOURCE} {1} +set_instance_parameter_value sys_hps {CLK_S2F_USER0_SOURCE} {1} +set_instance_parameter_value sys_hps {CLK_S2F_USER1_SOURCE} {1} +set_instance_parameter_value sys_hps {CLK_SDMMC_SOURCE} {0} +set_instance_parameter_value sys_hps {CTI_Enable} {0} +set_instance_parameter_value sys_hps {CUSTOM_MPU_CLK} {800} +set_instance_parameter_value sys_hps {DMA_Enable} {No No No No No No No No} +set_instance_parameter_value sys_hps {EMAC0_CLK} {250} +set_instance_parameter_value sys_hps {EMAC0_Mode} {RGMII_with_MDIO} +set_instance_parameter_value sys_hps {EMAC0_PTP} {0} +set_instance_parameter_value sys_hps {EMAC0_PinMuxing} {IO} +set_instance_parameter_value sys_hps {EMAC0_SWITCH_Enable} {0} +set_instance_parameter_value sys_hps {EMAC_PTP_REF_CLK} {100} +set_instance_parameter_value sys_hps {EMIF_BYPASS_CHECK} {0} +set_instance_parameter_value sys_hps {EMIF_CONDUIT_Enable} {1} +set_instance_parameter_value sys_hps {F2SDRAM0_Width} {3} +set_instance_parameter_value sys_hps {F2SDRAM0_ready_latency} {0} +set_instance_parameter_value sys_hps {F2SDRAM_ADDRESS_WIDTH} {32} +set_instance_parameter_value sys_hps {F2SINTERRUPT_Enable} {1} +set_instance_parameter_value sys_hps {GPIO_REF_CLK} {4} +set_instance_parameter_value sys_hps {GPIO_REF_CLK2} {200} +set_instance_parameter_value sys_hps {H2F_COLD_RST_Enable} {1} +set_instance_parameter_value sys_hps {H2F_PENDING_RST_Enable} {1} +set_instance_parameter_value sys_hps {H2F_USER0_CLK_Enable} {1} +set_instance_parameter_value sys_hps {H2F_USER0_CLK_FREQ} {200} +set_instance_parameter_value sys_hps {HPS_BOOT} {1} +set_instance_parameter_value sys_hps {HPS_IO_Enable} $hps_io_list +set_instance_parameter_value sys_hps {IO_OUTPUT_DELAY12} {17} +set_instance_parameter_value sys_hps {L3_MAIN_FREE_CLK} {400} +set_instance_parameter_value sys_hps {L4_SYS_FREE_CLK} {1} +set_instance_parameter_value sys_hps {LWH2F_ADDRESS_WIDTH} {21} +set_instance_parameter_value sys_hps {LWH2F_Enable} {1} +set_instance_parameter_value sys_hps {LWH2F_ready_latency} {0} +set_instance_parameter_value sys_hps {MPU_CLK_VCCL} {1} +set_instance_parameter_value sys_hps {MPU_EVENTS_Enable} {0} +set_instance_parameter_value sys_hps {PSI_CLK_FREQ} {500} +set_instance_parameter_value sys_hps {S2F_ready_latency} {0} +set_instance_parameter_value sys_hps {SDMMC_Mode} {4-bit} +set_instance_parameter_value sys_hps {SDMMC_PinMuxing} {IO} +set_instance_parameter_value sys_hps {SDMMC_REF_CLK} {200} +set_instance_parameter_value sys_hps {I2C1_Mode} {default} +set_instance_parameter_value sys_hps {I2C1_PinMuxing} {IO} +set_instance_parameter_value sys_hps {SPIM0_Mode} {N/A} +set_instance_parameter_value sys_hps {SPIM0_PinMuxing} {Unused} +set_instance_parameter_value sys_hps {SPIM1_Mode} {N/A} +set_instance_parameter_value sys_hps {SPIM1_PinMuxing} {Unused} +set_instance_parameter_value sys_hps {STM_Enable} {1} +set_instance_parameter_value sys_hps {TESTIOCTRL_DEBUGCLKSEL} {16} +set_instance_parameter_value sys_hps {TESTIOCTRL_MAINCLKSEL} {8} +set_instance_parameter_value sys_hps {TESTIOCTRL_PERICLKSEL} {8} +set_instance_parameter_value sys_hps {TEST_Enable} {0} +set_instance_parameter_value sys_hps {TRACE_Mode} {N/A} +set_instance_parameter_value sys_hps {TRACE_PinMuxing} {Unused} +set_instance_parameter_value sys_hps {UART0_Mode} {No_flow_control} +set_instance_parameter_value sys_hps {UART0_PinMuxing} {IO} +set_instance_parameter_value sys_hps {UART1_Mode} {N/A} +set_instance_parameter_value sys_hps {UART1_PinMuxing} {Unused} +set_instance_parameter_value sys_hps {USB0_Mode} {default} +set_instance_parameter_value sys_hps {USB0_PinMuxing} {IO} +set_instance_parameter_value sys_hps {USB1_Mode} {N/A} +set_instance_parameter_value sys_hps {USB1_PinMuxing} {Unused} +set_instance_parameter_value sys_hps {USE_DEFAULT_MPU_CLK} {0} +set_instance_parameter_value sys_hps {W_RESET_ACTION} {0} +set_instance_parameter_value sys_hps {eosc1_clk_mhz} {25.0} +set_instance_parameter_value sys_hps {watchdog_reset} {1} + +add_interface sys_hps_io conduit end +set_interface_property sys_hps_io EXPORT_OF sys_hps.hps_io +add_connection sys_clk.clk sys_hps.h2f_lw_axi_clock +add_connection sys_clk.clk_reset sys_hps.h2f_lw_axi_reset +add_connection sys_clk.clk sys_hps.f2h_axi_clock +add_connection sys_clk.clk_reset sys_hps.f2h_axi_reset +add_connection sys_clk.clk sys_hps.h2f_axi_clock +add_connection sys_clk.clk_reset sys_hps.h2f_axi_reset + +add_interface h2f_reset reset source +set_interface_property h2f_reset EXPORT_OF sys_hps.h2f_reset + +# common dma interface + +add_instance sys_dma_clk clock_source +set_instance_parameter_value sys_dma_clk {resetSynchronousEdges} {DEASSERT} +add_connection sys_clk.clk_reset sys_dma_clk.clk_in_reset +add_connection sys_hps.h2f_user0_clock sys_dma_clk.clk_in +add_connection sys_dma_clk.clk sys_hps.f2sdram0_clock +add_connection sys_dma_clk.clk_reset sys_hps.f2sdram0_reset + +# hps ddr4 interface + +add_instance sys_hps_ddr4_cntrl altera_emif_s10_hps +set_instance_parameter_value sys_hps_ddr4_cntrl {PROTOCOL_ENUM} {PROTOCOL_DDR4} +set_instance_parameter_value sys_hps_ddr4_cntrl {PHY_DDR4_MEM_CLK_FREQ_MHZ} {1066.667} +set_instance_parameter_value sys_hps_ddr4_cntrl {PHY_DDR4_DEFAULT_REF_CLK_FREQ} {0} +set_instance_parameter_value sys_hps_ddr4_cntrl {PHY_DDR4_USER_REF_CLK_FREQ_MHZ} {133.333} +set_instance_parameter_value sys_hps_ddr4_cntrl {MEM_DDR4_BANK_GROUP_WIDTH} {1} +set_instance_parameter_value sys_hps_ddr4_cntrl {MEM_DDR4_ALERT_N_PLACEMENT_ENUM} {DDR4_ALERT_N_PLACEMENT_DATA_LANES} +set_instance_parameter_value sys_hps_ddr4_cntrl {MEM_DDR4_ALERT_N_DQS_GROUP} {0} +set_instance_parameter_value sys_hps_ddr4_cntrl {MEM_DDR4_DQ_WIDTH} {72} +set_instance_parameter_value sys_hps_ddr4_cntrl {MEM_DDR4_READ_DBI} {1} +set_instance_parameter_value sys_hps_ddr4_cntrl {MEM_DDR4_TCL} {18} +set_instance_parameter_value sys_hps_ddr4_cntrl {MEM_DDR4_WTCL} {16} +set_instance_parameter_value sys_hps_ddr4_cntrl {MEM_DDR4_RTT_NOM_ENUM} {DDR4_RTT_NOM_RZQ_4} +set_instance_parameter_value sys_hps_ddr4_cntrl {PHY_DDR4_DEFAULT_IO} {0} +set_instance_parameter_value sys_hps_ddr4_cntrl {PHY_DDR4_USER_AC_IO_STD_ENUM} {IO_STD_SSTL_12} +set_instance_parameter_value sys_hps_ddr4_cntrl {PHY_DDR4_USER_AC_MODE_ENUM} {OUT_OCT_40_CAL} +set_instance_parameter_value sys_hps_ddr4_cntrl {PHY_DDR4_USER_CK_IO_STD_ENUM} {IO_STD_SSTL_12} +set_instance_parameter_value sys_hps_ddr4_cntrl {PHY_DDR4_USER_CK_MODE_ENUM} {OUT_OCT_40_CAL} +set_instance_parameter_value sys_hps_ddr4_cntrl {PHY_DDR4_USER_DATA_IO_STD_ENUM} {IO_STD_POD_12} +set_instance_parameter_value sys_hps_ddr4_cntrl {PHY_DDR4_USER_DATA_OUT_MODE_ENUM} {OUT_OCT_40_CAL} +set_instance_parameter_value sys_hps_ddr4_cntrl {PHY_DDR4_USER_DATA_IN_MODE_ENUM} {IN_OCT_60_CAL} +set_instance_parameter_value sys_hps_ddr4_cntrl {PHY_DDR4_USER_PLL_REF_CLK_IO_STD_ENUM} {IO_STD_LVDS} +set_instance_parameter_value sys_hps_ddr4_cntrl {PHY_DDR4_USER_RZQ_IO_STD_ENUM} {IO_STD_CMOS_12} +set_instance_parameter_value sys_hps_ddr4_cntrl {MEM_DDR4_SPEEDBIN_ENUM} {DDR4_SPEEDBIN_2400} +set_instance_parameter_value sys_hps_ddr4_cntrl {MEM_DDR4_TRCD_NS} {15.00} +set_instance_parameter_value sys_hps_ddr4_cntrl {MEM_DDR4_TRP_NS} {15.00} +set_instance_parameter_value sys_hps_ddr4_cntrl {MEM_DDR4_TRRD_S_CYC} {7} +set_instance_parameter_value sys_hps_ddr4_cntrl {MEM_DDR4_TRRD_L_CYC} {8} +set_instance_parameter_value sys_hps_ddr4_cntrl {MEM_DDR4_TFAW_NS} {30.0} +set_instance_parameter_value sys_hps_ddr4_cntrl {MEM_DDR4_TWTR_S_CYC} {3} +set_instance_parameter_value sys_hps_ddr4_cntrl {MEM_DDR4_TWTR_L_CYC} {9} +set_instance_parameter_value sys_hps_ddr4_cntrl {MEM_DDR4_LRDIMM_VREFDQ_VALUE} {} +set_instance_parameter_value sys_hps_ddr4_cntrl {DIAG_DDR4_SKIP_CA_LEVEL} {0} +set_instance_parameter_value sys_hps_ddr4_cntrl {SHORT_QSYS_INTERFACE_NAMES} {1} +set_instance_parameter_value sys_hps_ddr4_cntrl {CTRL_DDR4_ECC_EN} {1} + +add_connection sys_hps_ddr4_cntrl.hps_emif sys_hps.hps_emif +add_interface sys_hps_ddr conduit end +set_interface_property sys_hps_ddr EXPORT_OF sys_hps_ddr4_cntrl.mem +add_interface sys_hps_ddr_oct conduit end +set_interface_property sys_hps_ddr_oct EXPORT_OF sys_hps_ddr4_cntrl.oct +add_interface sys_hps_ddr_ref_clk clock sink +set_interface_property sys_hps_ddr_ref_clk EXPORT_OF sys_hps_ddr4_cntrl.pll_ref_clk + +# cpu/hps handling + +proc ad_cpu_interrupt {m_irq m_port} { + + add_connection sys_hps.f2h_irq0 ${m_port} + set_connection_parameter_value sys_hps.f2h_irq0/${m_port} irqNumber ${m_irq} +} + +proc ad_cpu_interconnect {m_base m_port} { + + add_connection sys_hps.h2f_lw_axi_master ${m_port} + set_connection_parameter_value sys_hps.h2f_lw_axi_master/${m_port} baseAddress ${m_base} +} + +proc ad_dma_interconnect {m_port} { + + add_connection ${m_port} sys_hps.f2sdram0_data + set_connection_parameter_value ${m_port}/sys_hps.f2sdram0_data baseAddress {0x0} +} + +# gpio-bd + +add_instance sys_gpio_bd altera_avalon_pio +set_instance_parameter_value sys_gpio_bd {direction} {InOut} +set_instance_parameter_value sys_gpio_bd {generateIRQ} {1} +set_instance_parameter_value sys_gpio_bd {width} {32} + +add_connection sys_clk.clk sys_gpio_bd.clk +add_connection sys_clk.clk_reset sys_gpio_bd.reset +add_interface sys_gpio_bd conduit end +set_interface_property sys_gpio_bd EXPORT_OF sys_gpio_bd.external_connection + +# gpio-in + +add_instance sys_gpio_in altera_avalon_pio +set_instance_parameter_value sys_gpio_in {direction} {Input} +set_instance_parameter_value sys_gpio_in {generateIRQ} {1} +set_instance_parameter_value sys_gpio_in {width} {32} + +add_connection sys_clk.clk_reset sys_gpio_in.reset +add_connection sys_clk.clk sys_gpio_in.clk +add_interface sys_gpio_in conduit end +set_interface_property sys_gpio_in EXPORT_OF sys_gpio_in.external_connection + +# gpio-out + +add_instance sys_gpio_out altera_avalon_pio +set_instance_parameter_value sys_gpio_out {direction} {Output} +set_instance_parameter_value sys_gpio_out {generateIRQ} {0} +set_instance_parameter_value sys_gpio_out {width} {32} + +add_connection sys_clk.clk_reset sys_gpio_out.reset +add_connection sys_clk.clk sys_gpio_out.clk +add_interface sys_gpio_out conduit end +set_interface_property sys_gpio_out EXPORT_OF sys_gpio_out.external_connection + +# spi + +add_instance sys_spi altera_avalon_spi +set_instance_parameter_value sys_spi {clockPhase} {0} +set_instance_parameter_value sys_spi {clockPolarity} {0} +set_instance_parameter_value sys_spi {dataWidth} {8} +set_instance_parameter_value sys_spi {masterSPI} {1} +set_instance_parameter_value sys_spi {numberOfSlaves} {8} +set_instance_parameter_value sys_spi {targetClockRate} {10000000.0} + +add_connection sys_clk.clk_reset sys_spi.reset +add_connection sys_clk.clk sys_spi.clk +add_interface sys_spi conduit end +set_interface_property sys_spi EXPORT_OF sys_spi.external + +# base-addresses + +ad_cpu_interconnect 0x000000e0 sys_id.control_slave +ad_cpu_interconnect 0x000000d0 sys_gpio_bd.s1 +ad_cpu_interconnect 0x00000000 sys_gpio_in.s1 +ad_cpu_interconnect 0x00000020 sys_gpio_out.s1 +ad_cpu_interconnect 0x00000040 sys_spi.spi_control_port + +# interrupts + +ad_cpu_interrupt 5 sys_gpio_in.irq +ad_cpu_interrupt 6 sys_gpio_bd.irq +ad_cpu_interrupt 7 sys_spi.irq + +# architecture specific global variables + +set xcvr_reconfig_addr_width 11 + diff --git a/projects/scripts/adi_project_intel.tcl b/projects/scripts/adi_project_intel.tcl index edfeca6ff..e83d33daa 100644 --- a/projects/scripts/adi_project_intel.tcl +++ b/projects/scripts/adi_project_intel.tcl @@ -54,6 +54,12 @@ proc adi_project {project_name {parameter_list {}}} { set system_qip_file system_bd/system_bd.qip } + if [regexp "_s10soc$" $project_name] { + set family "Stratix 10" + set device 1SX280LU2F50E2VGS2 + set system_qip_file system_bd/system_bd.qip + } + if [regexp "_c5soc$" $project_name] { set family "Cyclone V" set device 5CSXFC6D6F31C8ES