ad469x: Use axi_pwm_gen; clean-up
Replace axi_pulse_gen with axi_pmw_gen for softare support considerations. Remove common/config.tcl and update project scripts accordingly.main
parent
eb663876d7
commit
f64830364c
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@ -5,11 +5,11 @@ create_bd_port -dir I ad469x_spi_busy
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source $ad_hdl_dir/library/spi_engine/scripts/spi_engine.tcl
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set data_width $ad_project_params(DATA_WIDTH)
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set async_spi_clk $ad_project_params(ASYNC_SPI_CLK)
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set num_cs $ad_project_params(NUM_CS)
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set num_sdi $ad_project_params(NUM_SDI)
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set sdi_delay $ad_project_params(SDI_DELAY)
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set data_width 32
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set async_spi_clk 1
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set num_cs 1
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set num_sdi 1
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set sdi_delay 1
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set hier_spi_engine spi_ad469x
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@ -28,10 +28,10 @@ ad_connect spi_clk spi_clkgen/clk_0
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## the acutal sample rate will be PULSE_PERIOD * (1/sys_cpu_clk)
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set sampling_cycle [expr int(ceil(double($spi_clk_ref_frequency * 1000000) / $adc_sampling_rate))]
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ad_ip_instance axi_pulse_gen ad469x_trigger_gen
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ad_ip_instance axi_pwm_gen ad469x_trigger_gen
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ad_ip_parameter ad469x_trigger_gen CONFIG.PULSE_PERIOD $sampling_cycle
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ad_ip_parameter ad469x_trigger_gen CONFIG.PULSE_WIDTH 1
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ad_ip_parameter ad469x_trigger_gen CONFIG.PULSE_0_PERIOD $sampling_cycle
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ad_ip_parameter ad469x_trigger_gen CONFIG.PULSE_0_WIDTH 1
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ad_connect spi_clk ad469x_trigger_gen/ext_clk
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ad_connect $sys_cpu_clk ad469x_trigger_gen/s_axi_aclk
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@ -80,7 +80,7 @@ ad_ip_parameter cnv_gate CONFIG.C_SIZE 1
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ad_ip_parameter cnv_gate CONFIG.C_OPERATION {and}
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ad_connect cnv_gate/Op1 axi_ad469x_dma/s_axis_xfer_req
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ad_connect cnv_gate/Op2 ad469x_trigger_gen/pulse
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ad_connect cnv_gate/Op2 ad469x_trigger_gen/pwm_0
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ad_connect cnv_gate/Res ad469x_spi_cnv
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ad_cpu_interconnect 0x44a00000 $hier_spi_engine/axi_regmap
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@ -1,20 +0,0 @@
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set device AD469X
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set mode 0
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set hier_spi_engine spi_ad469x
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# Mode DATA_WIDTH ASYNC_SPI_CLK NUM_CSN NUM_SDI SDI_DELAY
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set params(AD469X,0) {32 1 1 1 1}
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proc get_config_param {param} {
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upvar device device
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upvar mode mode
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upvar params params
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set spi_params {DATA_WIDTH ASYNC_SPI_CLK NUM_CS NUM_SDI SDI_DELAY}
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set index [lsearch $spi_params $param]
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return [lindex $params($device,$mode) $index]
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}
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@ -6,7 +6,6 @@
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PROJECT_NAME := ad469x_fmc_zed
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M_DEPS += ../common/config.tcl
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M_DEPS += ../common/ad469x_bd.tcl
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M_DEPS += ../../scripts/adi_pd.tcl
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M_DEPS += ../../common/zed/zed_system_constr.xdc
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@ -20,7 +19,7 @@ LIB_DEPS += axi_clkgen
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LIB_DEPS += axi_dmac
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LIB_DEPS += axi_hdmi_tx
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LIB_DEPS += axi_i2s_adi
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LIB_DEPS += axi_pulse_gen
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LIB_DEPS += axi_pwm_gen
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LIB_DEPS += axi_spdif_tx
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LIB_DEPS += axi_sysid
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LIB_DEPS += spi_engine/axi_spi_engine
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@ -1,15 +1,8 @@
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source ../../../scripts/adi_env.tcl
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source ../../scripts/adi_project_xilinx.tcl
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source ../../scripts/adi_board.tcl
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source ../common/config.tcl
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adi_project ad469x_fmc_zed 0 [list \
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DATA_WIDTH [get_config_param DATA_WIDTH] \
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ASYNC_SPI_CLK [get_config_param ASYNC_SPI_CLK] \
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NUM_CS [get_config_param NUM_CS] \
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NUM_SDI [get_config_param NUM_SDI] \
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SDI_DELAY [get_config_param SDI_DELAY] \
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]
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adi_project ad469x_fmc_zed
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adi_project_files ad469x_fmc_zed [list \
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"../../../library/common/ad_iobuf.v" \
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