axi_ad9361: Fix typo in tdd interface
As alluded to in the subject, this commit simply fixes what appears to be a copy-paste bug. Signed-off-by: David Winter <david.winter@analog.com>main
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bf77271fb3
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f2017050ed
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@ -143,7 +143,7 @@ module axi_ad9361_tdd (
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end
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always @(posedge clk) begin
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if((tdd_enable_s == 1) && (tdd_gated_tx_dmapath_s == 1)) begin
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if((tdd_enable_s == 1) && (tdd_gated_rx_dmapath_s == 1)) begin
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tdd_rx_valid <= tdd_rx_dp_en_s;
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end else begin
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tdd_rx_valid <= 1'b1;
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