ad7616_sdz: Update the project

+ Fix system_top.v
+ Finish up the common block design
+ Fix system_project.tcl

projects/ad7616_sdz/common/ad7616_bd.tcl

@@ -1,4 +1,24 @@
 
+##--------------------------------------------------------------
+# IMPORTANT: Set AD7616 operation and interface mode
+#
+#    ad7616_opm - Defines the operation mode (software OR hardware)
+#    ad7616_if  - Defines the interface type (serial OR parallel)
+#
+# LEGEND: Software  - 0
+#         Hardware  - 1
+#         Serial    - 0
+#         Parallel  - 1
+#
+# NOTE : These switches are 'hardware' switches. User needs to
+# reimplement the design each and every time, after these variables
+# were changed.
+
+set ad7616_opm  0
+set ad7616_if   0
+
+##--------------------------------------------------------------
+
 # data interfaces
 
 create_bd_port -dir O sclk
@@ -13,14 +33,74 @@ create_bd_port -dir O wr_n
 
 # control lines
 
-create_bd_port -dri O reset_n
+create_bd_port -dir O reset_n
 create_bd_port -dir O cnvst
 create_bd_port -dir O cs_n
-create_bd_port -dir O busy
+create_bd_port -dir I busy
 create_bd_port -dir O seq_en
 create_bd_port -dir O -from 1 -to 0 hw_rngsel
 create_bd_port -dir O -from 2 -to 0 chsel
+create_bd_port -dir O crcen
+create_bd_port -dir O burst
+create_bd_port -dir O -from 2 -to 0 os
 
 # instantiation
 
+set axi_ad7616 [create_bd_cell -type ip -vlnv analog.com:user:axi_ad7616:1.0 axi_ad7616]
+set_property -dict [list CONFIG.OP_MODE $ad7616_opm] $axi_ad7616
+set_property -dict [list CONFIG.IF_TYPE $ad7616_if] $axi_ad7616
+
+set axi_ad7616_dma [create_bd_cell -type ip -vlnv analog.com:user:axi_dmac:1.0 axi_ad7616_dma]
+set_property -dict [list CONFIG.DMA_TYPE_SRC {1}] $axi_ad7616_dma
+set_property -dict [list CONFIG.DMA_TYPE_DEST {0}] $axi_ad7616_dma
+set_property -dict [list CONFIG.CYCLIC {0}] $axi_ad7616_dma
+set_property -dict [list CONFIG.DMA_2D_TRANSFER {0}] $axi_ad7616_dma
+set_property -dict [list CONFIG.DMA_DATA_WIDTH_SRC {32}] $axi_ad7616_dma
+set_property -dict [list CONFIG.DMA_DATA_WIDTH_DEST {64}] $axi_ad7616_dma
+
+# interface connections
+if {$ad7616_if == 0} {
+
+  ad_connect  sclk axi_ad7616/sclk
+  ad_connect  sdo axi_ad7616/sdo
+  ad_connect  sdi_0 axi_ad7616/sdi_0
+  ad_connect  sdi_1 axi_ad7616/sdi_1
+  ad_connect  cs_n axi_ad7616/cs_n
+
+  ad_connect  reset_n axi_ad7616/reset_n
+  ad_connect  cnvst axi_ad7616/cnvst
+  ad_connect  busy axi_ad7616/busy
+  ad_connect  seq_en axi_ad7616/seq_en
+  ad_connect  hw_rngsel axi_ad7616/hw_rngsel
+  ad_connect  chsel axi_ad7616/chsel
+  ad_connect  crcen axi_ad7616/crcen
+  ad_connect  burst axi_ad7616/burst
+  ad_connect  os axi_ad7616/os
+
+  ad_connect  db_o GND
+  ad_connect  wr_n GND
+  ad_connect  rd_n GND
+
+} else {
+
+}
+
+ad_connect  axi_ad7616/m_axis axi_ad7616_dma/s_axis
+ad_connect  sys_cpu_clk axi_ad7616_dma/s_axis_aclk
+
+# interconnect
+
+ad_cpu_interconnect  0x44A00000 axi_ad7616
+ad_cpu_interconnect  0x44A30000 axi_ad7616_dma
+
+# memory interconnect
+
+ad_mem_hp1_interconnect sys_cpu_clk sys_ps7/S_AXI_HP1
+ad_mem_hp1_interconnect sys_cpu_clk axi_ad7616_dma/m_dest_axi
+ad_connect sys_cpu_resetn axi_ad7616_dma/m_dest_axi_aresetn
+
+# interrupts
+
+ad_cpu_interrupt ps-13 mb-12 axi_ad7616_dma/irq
+ad_cpu_interrupt ps-12 mb-13 axi_ad7616/irq
 

projects/ad7616_sdz/zc706/system_project.tcl

@@ -9,12 +9,15 @@ set ad7616_interface "serial"
 adi_project_create ad7616_sdz_zc706
 
 if { $ad7616_interface eq "serial" } {
+
   adi_project_files ad7616_sdz_zc706 [list \
     "$ad_hdl_dir/library/common/ad_iobuf.v" \
     "system_top.v" \
     "serial_if_constr.xdc" \
     "$ad_hdl_dir/projects/common/zc706/zc706_system_constr.xdc"]
-} else if { $ad7616_interface eq "parallel" } {
+
+} elseif { $ad7616_interface eq "parallel" } {
+
   adi_project_files ad7616_sdz_zc706 [list \
     "$ad_hdl_dir/library/common/ad_iobuf.v" \
     "system_top.v" \
@@ -22,6 +25,10 @@ if { $ad7616_interface eq "serial" } {
     "$ad_hdl_dir/projects/common/zc706/zc706_system_constr.xdc"]
 
 } else {
+
   return -code error [format "ERROR: Invalid interface type! Define as \'serial\' or \'parallel\' ..."]
+
 }
 
+adi_project_run ad7616_sdz_zc706
+

projects/ad7616_sdz/zc706/system_top.v

@@ -77,21 +77,21 @@ module system_top (
   iic_scl,
   iic_sda,
 
+  spi_sclk,
   spi_sdo,
   spi_sdi_0,
   spi_sdi_1,
   spi_cs_n,
 
-  adc_db_o,
-  adc_db_i,
-  adc_rd_n,
-  adc_wr_n,
   adc_reset_n,
-  adc_cnvst,
+  adc_convst,
   adc_busy,
   adc_seq_en,
   adc_hw_rngsel,
-  adc_chsel);
+  adc_chsel,
+  adc_crcen,
+  adc_burst,
+  adc_os);
 
   inout   [14:0]  ddr_addr;
   inout   [ 2:0]  ddr_ba;
@@ -129,21 +129,21 @@ module system_top (
   inout           iic_scl;
   inout           iic_sda;
 
+  output          spi_sclk;
   output          spi_sdo;
   input           spi_sdi_0;
   input           spi_sdi_1;
   output          spi_cs_n;
 
-  output  [15:0]  adc_db_o;
-  input   [15:0]  adc_db_i;
-  output          adc_rd_n;
-  output          adc_wr_n;
   output          adc_reset_n;
-  output          adc_cnvst;
+  output          adc_convst;
   output          adc_busy;
   output          adc_seq_en;
   output  [ 1:0]  adc_hw_rngsel;
   output  [ 2:0]  adc_chsel;
+  output          adc_crcen;
+  output          adc_burst;
+  output  [ 2:0]  adc_os;
 
   // internal signals
 
@@ -205,24 +205,21 @@ module system_top (
     .ps_intr_09 (1'b0),
     .ps_intr_10 (1'b0),
     .ps_intr_11 (1'b0),
-    .ps_intr_12 (1'b0),
-    .ps_intr_13 (1'b0),
     .spdif (spdif),
     .sclk (spi_sclk),
     .sdo (spi_sdo),
     .sdi_0 (spi_sdi_0),
     .sdi_1 (spi_sdi_1),
-    .db_o (adc_db_o),
-    .db_i (adc_db_i),
-    .rd_n (adc_rd_n),
-    .wr_n (adc_wr_n),
     .reset_n (adc_reset_n),
-    .cnvst (adc_cnvst),
+    .cnvst (adc_convst),
     .cs_n (spi_cs_n),
     .busy (adc_busy),
     .seq_en (adc_seq_en),
     .hw_rngsel (adc_hw_rngsel),
-    .chsel (adc_chsel));
+    .chsel (adc_chsel),
+    .crcen (adc_crcen),
+    .burst (adc_burst),
+    .os (adc_os));
 
 endmodule