From edeeafa47d3c7e564266eb9ec9357ccddc977aef Mon Sep 17 00:00:00 2001 From: Adrian Costina Date: Thu, 9 Oct 2014 14:52:25 +0300 Subject: [PATCH] ad9671_fmc: Added sof information to the AD9671 driver --- projects/ad9671_fmc/common/ad9671_fmc_bd.tcl | 15 ++++++++++++--- projects/ad9671_fmc/zc706/system_top.v | 17 +++++++++++------ 2 files changed, 23 insertions(+), 9 deletions(-) diff --git a/projects/ad9671_fmc/common/ad9671_fmc_bd.tcl b/projects/ad9671_fmc/common/ad9671_fmc_bd.tcl index ec02986c7..595e3d9b3 100755 --- a/projects/ad9671_fmc/common/ad9671_fmc_bd.tcl +++ b/projects/ad9671_fmc/common/ad9671_fmc_bd.tcl @@ -16,6 +16,9 @@ set rx_sync [create_bd_port -dir O rx_sync] set rx_sysref [create_bd_port -dir O rx_sysref] set rx_data_p [create_bd_port -dir I -from 1 -to 0 rx_data_p] set rx_data_n [create_bd_port -dir I -from 1 -to 0 rx_data_n] +set gt_rx_data_sof [create_bd_port -dir O gt_rx_data_sof] +set ad9671_sof [create_bd_port -dir I ad9671_sof] + set adc_clk [create_bd_port -dir O adc_clk] set adc_enable [create_bd_port -dir O -from 7 -to 0 adc_enable] @@ -31,7 +34,7 @@ set dma_data [create_bd_port -dir I -from 127 -to 0 dma_data] set axi_ad9671_core [create_bd_cell -type ip -vlnv analog.com:user:axi_ad9671:1.0 axi_ad9671_core] set_property -dict [list CONFIG.PCORE_4L_2L_N {0}] [get_bd_cells axi_ad9671_core] -set axi_ad9671_jesd [create_bd_cell -type ip -vlnv xilinx.com:ip:jesd204:5.1 axi_ad9671_jesd] +set axi_ad9671_jesd [create_bd_cell -type ip -vlnv xilinx.com:ip:jesd204:5.2 axi_ad9671_jesd] set_property -dict [list CONFIG.C_NODE_IS_TRANSMIT {0}] $axi_ad9671_jesd set_property -dict [list CONFIG.C_LANES {2}] $axi_ad9671_jesd @@ -122,10 +125,12 @@ connect_bd_net -net axi_ad9671_gt_rx_ip_sync [get_bd_pins axi_ad9671_gt/r connect_bd_net -net axi_ad9671_gt_rx_ip_sof [get_bd_pins axi_ad9671_gt/rx_ip_sof] [get_bd_pins axi_ad9671_jesd/rx_start_of_frame] connect_bd_net -net axi_ad9671_gt_rx_ip_data [get_bd_pins axi_ad9671_gt/rx_ip_data] [get_bd_pins axi_ad9671_jesd/rx_tdata] connect_bd_net -net axi_ad9671_gt_rx_data [get_bd_pins axi_ad9671_gt/rx_data] [get_bd_pins axi_ad9671_core/rx_data] +connect_bd_net -net axi_ad9671_gt_rx_data_sof [get_bd_pins axi_ad9671_gt/rx_data_sof] [get_bd_ports gt_rx_data_sof] connect_bd_net -net axi_ad9671_core_adc_clk [get_bd_pins axi_ad9671_core/adc_clk] [get_bd_pins axi_ad9671_dma/fifo_wr_clk] connect_bd_net -net axi_ad9671_core_adc_enable [get_bd_pins axi_ad9671_core/adc_enable] [get_bd_ports adc_enable] connect_bd_net -net axi_ad9671_core_adc_valid [get_bd_pins axi_ad9671_core/adc_valid] [get_bd_ports adc_valid] connect_bd_net -net axi_ad9671_core_adc_data [get_bd_pins axi_ad9671_core/adc_data] [get_bd_ports adc_data] +connect_bd_net -net axi_ad9671_core_sof [get_bd_pins axi_ad9671_core/rx_data_sof] [get_bd_ports ad9671_sof] connect_bd_net -net axi_ad9671_core_adc_dwr [get_bd_ports dma_wr] [get_bd_pins axi_ad9671_dma/fifo_wr_en] connect_bd_net -net axi_ad9671_core_adc_dsync [get_bd_ports dma_sync] [get_bd_pins axi_ad9671_dma/fifo_wr_sync] connect_bd_net -net axi_ad9671_core_adc_ddata [get_bd_ports dma_data] [get_bd_pins axi_ad9671_dma/fifo_wr_din] @@ -192,12 +197,15 @@ connect_bd_net -net sys_fmc_dma_resetn [get_bd_pins axi_ad9671_dma/m_dest_axi_ar # ila -set ila_jesd_rx_mon [create_bd_cell -type ip -vlnv xilinx.com:ip:ila:3.0 ila_jesd_rx_mon] -set_property -dict [list CONFIG.C_NUM_OF_PROBES {4}] $ila_jesd_rx_mon +set ila_jesd_rx_mon [create_bd_cell -type ip -vlnv xilinx.com:ip:ila:4.0 ila_jesd_rx_mon] +set_property -dict [list CONFIG.C_MONITOR_TYPE {Native}] $ila_jesd_rx_mon +set_property -dict [list CONFIG.C_EN_STRG_QUAL {1}] $ila_jesd_rx_mon +set_property -dict [list CONFIG.C_NUM_OF_PROBES {5}] $ila_jesd_rx_mon set_property -dict [list CONFIG.C_PROBE0_WIDTH {170}] $ila_jesd_rx_mon set_property -dict [list CONFIG.C_PROBE1_WIDTH {4}] $ila_jesd_rx_mon set_property -dict [list CONFIG.C_PROBE2_WIDTH {64}] $ila_jesd_rx_mon set_property -dict [list CONFIG.C_PROBE3_WIDTH {128}] $ila_jesd_rx_mon +set_property -dict [list CONFIG.C_PROBE4_WIDTH {8}] $ila_jesd_rx_mon connect_bd_net -net axi_ad9671_gt_rx_mon_data [get_bd_pins axi_ad9671_gt/rx_mon_data] connect_bd_net -net axi_ad9671_gt_rx_mon_trigger [get_bd_pins axi_ad9671_gt/rx_mon_trigger] @@ -206,6 +214,7 @@ connect_bd_net -net axi_ad9671_gt_rx_mon_data [get_bd_pins ila_jesd_rx_mon connect_bd_net -net axi_ad9671_gt_rx_mon_trigger [get_bd_pins ila_jesd_rx_mon/PROBE1] connect_bd_net -net axi_ad9671_gt_rx_data [get_bd_pins ila_jesd_rx_mon/PROBE2] connect_bd_net -net axi_ad9671_core_adc_ddata [get_bd_pins ila_jesd_rx_mon/PROBE3] +connect_bd_net -net axi_ad9671_core_adc_valid [get_bd_pins ila_jesd_rx_mon/PROBE4] # address map diff --git a/projects/ad9671_fmc/zc706/system_top.v b/projects/ad9671_fmc/zc706/system_top.v index c2bb95876..94abad5ff 100644 --- a/projects/ad9671_fmc/zc706/system_top.v +++ b/projects/ad9671_fmc/zc706/system_top.v @@ -186,14 +186,18 @@ module system_top ( wire rx_ref_clk; wire rx_sysref; wire rx_sync; - wire [23:0] gpio_i; - wire [23:0] gpio_o; - wire [23:0] gpio_t; + wire [ 1:0] gt_rx_data_sof; + wire ad9671_sof; + wire [ 23:0] gpio_i; + wire [ 23:0] gpio_o; + wire [ 23:0] gpio_t; wire adc_clk; - wire [ 7:0] adc_enable; - wire [ 7:0] adc_valid; + wire [ 7:0] adc_enable; + wire [ 7:0] adc_valid; wire [127:0] adc_data; + assign ad9671_sof = |gt_rx_data_sof; + // pack place holder always @(posedge adc_clk) begin @@ -302,6 +306,8 @@ module system_top ( .rx_ref_clk (rx_ref_clk), .rx_sync (rx_sync), .rx_sysref (rx_sysref), + .gt_rx_data_sof(gt_rx_data_sof), + .ad9671_sof(ad9671_sof), .spdif (spdif), .spi_clk_i (spi_clk), .spi_clk_o (spi_clk), @@ -314,6 +320,5 @@ module system_top ( .spi_sdo_o (spi_mosi)); endmodule - // *************************************************************************** // ***************************************************************************