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ad9081_fmca_ebz: HP0 is already initialized in ZC706 

On carriers like ZC706 the HP0 interconnect is in already in use so it must
not be initialized here.
main
Laszlo Nagy 2020-11-05 11:24:58 +00:00 committed by Laszlo Nagy
parent b080b52a14
commit e9f319e3d7
2 changed files with 3 additions and 1 deletions
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1
projects/ad9081_fmca_ebz/common/ad9081_fmca_ebz_bd.tcl
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@ -498,7 +498,6 @@ ad_cpu_interconnect 0x7c430000 axi_mxfe_tx_dma
# interconnect (gt/adc) # interconnect (gt/adc)
if {$ADI_PHY_SEL == 1} { if {$ADI_PHY_SEL == 1} {
ad_mem_hp0_interconnect $sys_cpu_clk sys_ps7/S_AXI_HP0
ad_mem_hp0_interconnect $sys_cpu_clk axi_mxfe_rx_xcvr/m_axi ad_mem_hp0_interconnect $sys_cpu_clk axi_mxfe_rx_xcvr/m_axi
} }

3
projects/ad9081_fmca_ebz/zcu102/system_bd.tcl
View File

@ -8,6 +8,9 @@ set dac_fifo_samples_per_converter [expr 64*1024]
source $ad_hdl_dir/projects/common/zcu102/zcu102_system_bd.tcl source $ad_hdl_dir/projects/common/zcu102/zcu102_system_bd.tcl
source $ad_hdl_dir/projects/common/xilinx/adcfifo_bd.tcl source $ad_hdl_dir/projects/common/xilinx/adcfifo_bd.tcl
source $ad_hdl_dir/projects/common/xilinx/dacfifo_bd.tcl source $ad_hdl_dir/projects/common/xilinx/dacfifo_bd.tcl
ad_mem_hp0_interconnect $sys_cpu_clk sys_ps8/S_AXI_HP0
source ../common/ad9081_fmca_ebz_bd.tcl source ../common/ad9081_fmca_ebz_bd.tcl
#system ID #system ID