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ad9081_fmca_ebz: Remove bypass gpio 

Signed-off-by: David Winter <david.winter@analog.com>
main
David Winter 2021-04-20 08:51:23 +02:00 committed by Mihaita Nagy
parent 537a284115
commit e9e278c898
6 changed files with 4 additions and 17 deletions
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5
projects/ad9081_fmca_ebz/a10soc/system_top.v
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@ -164,7 +164,6 @@ module system_top #(
wire [ 63:0] gpio_i;
wire [ 63:0] gpio_o;
wire [ 7:0] spi_csn_s;
wire dac_fifo_bypass;
// assignments
@ -210,7 +209,6 @@ module system_top #(
assign rxen[1] = gpio_o[57];
assign txen[0] = gpio_o[58];
assign txen[1] = gpio_o[59];
assign dac_fifo_bypass = gpio_o[60];
// board stuff (max-v-u21)
@ -319,8 +317,7 @@ module system_top #(
.rx_ref_clk_clk (fpga_refclk_in),
.rx_sync_export (fpga_syncout),
.rx_sysref_export (sysref2),
.rx_device_clk_clk (clkin6),
.tx_fifo_bypass_bypass (dac_fifo_bypass)
.rx_device_clk_clk (clkin6)
);

2
projects/ad9081_fmca_ebz/common/ad9081_fmca_ebz_bd.tcl
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@ -319,8 +319,6 @@ ad_connect util_mxfe_upack/s_axis_valid VCC
ad_connect $dac_data_offload_name/init_req axi_mxfe_tx_dma/m_axis_xfer_req
ad_connect tx_mxfe_tpl_core/dac_dunf GND
create_bd_port -dir I dac_fifo_bypass
# interconnect (cpu)
ad_cpu_interconnect 0x44a60000 axi_mxfe_rx_xcvr
ad_cpu_interconnect 0x44b60000 axi_mxfe_tx_xcvr

2
projects/ad9081_fmca_ebz/common/ad9081_fmca_ebz_qsys.tcl
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@ -251,7 +251,6 @@ add_interface rx_device_clk clock sink
add_interface tx_serial_data conduit end
add_interface tx_sysref conduit end
add_interface tx_sync conduit end
add_interface tx_fifo_bypass conduit end
add_interface tx_device_clk clock sink
set_interface_property rx_ref_clk EXPORT_OF mxfe_rx_jesd204.ref_clk
@ -264,7 +263,6 @@ set_interface_property tx_ref_clk EXPORT_OF mxfe_tx_jesd204.ref_clk
set_interface_property tx_sysref EXPORT_OF mxfe_tx_jesd204.sysref
set_interface_property tx_sync EXPORT_OF mxfe_tx_jesd204.sync
set_interface_property tx_serial_data EXPORT_OF mxfe_tx_jesd204.serial_data
set_interface_property tx_fifo_bypass EXPORT_OF $dac_fifo_name.if_bypass
set_interface_property tx_device_clk EXPORT_OF tx_device_clk.in_clk
#

4
projects/ad9081_fmca_ebz/vcu118/system_top.v
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@ -253,7 +253,6 @@ module system_top #(
assign rxen[1] = gpio_o[57];
assign txen[0] = gpio_o[58];
assign txen[1] = gpio_o[59];
assign dac_fifo_bypass = gpio_o[60];
ad_iobuf #(.DATA_WIDTH(17)) i_iobuf_bd (
@ -350,8 +349,7 @@ module system_top #(
.rx_sync_0 (rx_syncout),
.tx_sync_0 (tx_syncin),
.rx_sysref_0 (sysref),
.tx_sysref_0 (sysref),
.dac_fifo_bypass (dac_fifo_bypass)
.tx_sysref_0 (sysref)
);
assign tx_data_p[TX_JESD_L*TX_NUM_LINKS-1:0] = tx_data_p_loc[TX_JESD_L*TX_NUM_LINKS-1:0];

4
projects/ad9081_fmca_ebz/zc706/system_top.v
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@ -233,7 +233,6 @@ module system_top #(
assign rxen[1] = gpio_o[57];
assign txen[0] = gpio_o[58];
assign txen[1] = gpio_o[59];
assign dac_fifo_bypass = gpio_o[60];
/* Board GPIOS. Buttons, LEDs, etc... */
ad_iobuf #(
@ -340,8 +339,7 @@ module system_top #(
.rx_sync_0 (rx_syncout),
.tx_sync_0 (tx_syncin),
.rx_sysref_0 (sysref),
.tx_sysref_0 (sysref),
.dac_fifo_bypass (dac_fifo_bypass)
.tx_sysref_0 (sysref)
);
assign rx_data_p_loc[TX_JESD_L*TX_NUM_LINKS-1:0] = rx_data_p[TX_JESD_L*TX_NUM_LINKS-1:0];

4
projects/ad9081_fmca_ebz/zcu102/system_top.v
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@ -203,7 +203,6 @@ module system_top #(
assign rxen[1] = gpio_o[57];
assign txen[0] = gpio_o[58];
assign txen[1] = gpio_o[59];
assign dac_fifo_bypass = gpio_o[60];
/* Board GPIOS. Buttons, LEDs, etc... */
assign gpio_i[20: 8] = gpio_bd_i;
@ -266,8 +265,7 @@ module system_top #(
.rx_sync_0 (rx_syncout),
.tx_sync_0 (tx_syncin),
.rx_sysref_0 (sysref),
.tx_sysref_0 (sysref),
.dac_fifo_bypass (dac_fifo_bypass)
.tx_sysref_0 (sysref)
);
assign rx_data_p_loc[RX_JESD_L*RX_NUM_LINKS-1:0] = rx_data_p[RX_JESD_L*RX_NUM_LINKS-1:0];