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pzsdr1/ccbrk_lvds- updates

main
Rejeesh Kutty 2016-11-17 15:32:25 -05:00
parent a61da1d2ac
commit e85dd2740a
5 changed files with 91 additions and 251 deletions
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17
projects/pzsdr1/ccbrk_lvds/Makefile
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@ -7,18 +7,15 @@
M_DEPS += system_top.v M_DEPS += system_top.v
M_DEPS += system_project.tcl M_DEPS += system_project.tcl
M_DEPS += system_constr.xdc
M_DEPS += system_bd.tcl M_DEPS += system_bd.tcl
M_DEPS += ../common/pzsdr1_constr_lvds.xdc
M_DEPS += ../common/pzsdr1_constr.xdc
M_DEPS += ../common/pzsdr1_bd.tcl
M_DEPS += ../common/ccbrk_constr.xdc
M_DEPS += ../common/ccbrk_bd.tcl M_DEPS += ../common/ccbrk_bd.tcl
M_DEPS += ../../scripts/adi_project.tcl M_DEPS += ../../scripts/adi_project.tcl
M_DEPS += ../../scripts/adi_env.tcl M_DEPS += ../../scripts/adi_env.tcl
M_DEPS += ../../scripts/adi_board.tcl M_DEPS += ../../scripts/adi_board.tcl
M_DEPS += ../../fmcomms2/common/fmcomms2_bd.tcl
M_DEPS += ../../common/xilinx/sys_wfifo.tcl
M_DEPS += ../../common/pzsdr1/pzsdr1_system_constr.xdc
M_DEPS += ../../common/pzsdr1/pzsdr1_system_bd.tcl
M_DEPS += ../../common/pzsdr1/pzsdr1_lvds_system_constr.xdc
M_DEPS += ../../common/pzsdr/pzsdr_system_ps7.tcl
M_DEPS += ../../../library/xilinx/common/ad_iobuf.v M_DEPS += ../../../library/xilinx/common/ad_iobuf.v
M_DEPS += ../../../library/axi_ad9361/axi_ad9361.xpr M_DEPS += ../../../library/axi_ad9361/axi_ad9361.xpr
M_DEPS += ../../../library/axi_dmac/axi_dmac.xpr M_DEPS += ../../../library/axi_dmac/axi_dmac.xpr
@ -47,7 +44,7 @@ M_FLIST += *.ip_user_files
.PHONY: all lib clean clean-all .PHONY: all lib clean clean-all
all: lib ccbrk_lvds_pzsdr1.sdk/system_top.hdf all: lib pzsdr1_ccbrk_lvds.sdk/system_top.hdf
clean: clean:
@ -64,9 +61,9 @@ clean-all:clean
make -C ../../../library/util_wfifo clean make -C ../../../library/util_wfifo clean
ccbrk_lvds_pzsdr1.sdk/system_top.hdf: $(M_DEPS) pzsdr1_ccbrk_lvds.sdk/system_top.hdf: $(M_DEPS)
-rm -rf $(M_FLIST) -rm -rf $(M_FLIST)
$(M_VIVADO) system_project.tcl >> ccbrk_lvds_pzsdr1_vivado.log 2>&1 $(M_VIVADO) system_project.tcl >> pzsdr1_ccbrk_lvds_vivado.log 2>&1
lib: lib:

4
projects/pzsdr1/ccbrk_lvds/system_bd.tcl
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@ -1,4 +1,6 @@
source $ad_hdl_dir/projects/common/pzsdr1/pzsdr1_system_bd.tcl source ../common/pzsdr1_bd.tcl
source ../common/ccbrk_bd.tcl source ../common/ccbrk_bd.tcl
cfg_ad9361_interface LVDS

104
projects/pzsdr1/ccbrk_lvds/system_constr.xdc
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@ -1,104 +0,0 @@
# gpio
set_property -dict {PACKAGE_PIN Y14 IOSTANDARD LVCMOS25} [get_ports gpio_bd[0]] ; ## (pb) IO_L8N_T1_34
set_property -dict {PACKAGE_PIN T16 IOSTANDARD LVCMOS25} [get_ports gpio_bd[1]] ; ## (pb) IO_L9P_T1_DQS_34
set_property -dict {PACKAGE_PIN U17 IOSTANDARD LVCMOS25} [get_ports gpio_bd[2]] ; ## (pb) IO_L9N_T1_DQS_34
set_property -dict {PACKAGE_PIN Y19 IOSTANDARD LVCMOS25} [get_ports gpio_bd[3]] ; ## (led) IO_L17N_T2_34
## constraints
## loopback
## p6
set_property -dict {PACKAGE_PIN T12 IOSTANDARD LVCMOS25} [get_ports gp_out[0]] ; ## JX4.20 IO_L2P_T0_34
set_property -dict {PACKAGE_PIN T11 IOSTANDARD LVCMOS25} [get_ports gp_in[0]] ; ## JX4.19 IO_L1P_T0_34
set_property -dict {PACKAGE_PIN U12 IOSTANDARD LVCMOS25} [get_ports gp_out[1]] ; ## JX4.22 IO_L2N_T0_34
set_property -dict {PACKAGE_PIN T10 IOSTANDARD LVCMOS25} [get_ports gp_in[1]] ; ## JX4.21 IO_L1N_T0_34
set_property -dict {PACKAGE_PIN V12 IOSTANDARD LVCMOS25} [get_ports gp_out[2]] ; ## JX4.26 IO_L4P_T0_34
set_property -dict {PACKAGE_PIN U13 IOSTANDARD LVCMOS25} [get_ports gp_in[2]] ; ## JX4.25 IO_L3P_T0_DQS_PUDC_B_34
set_property -dict {PACKAGE_PIN W13 IOSTANDARD LVCMOS25} [get_ports gp_out[3]] ; ## JX4.28 IO_L4N_T0_34
set_property -dict {PACKAGE_PIN V13 IOSTANDARD LVCMOS25} [get_ports gp_in[3]] ; ## JX4.27 IO_L3N_T0_DQS_34
set_property -dict {PACKAGE_PIN P14 IOSTANDARD LVCMOS25} [get_ports gp_out[4]] ; ## JX4.32 IO_L6P_T0_34
set_property -dict {PACKAGE_PIN T14 IOSTANDARD LVCMOS25} [get_ports gp_in[4]] ; ## JX4.31 IO_L5P_T0_34
set_property -dict {PACKAGE_PIN R14 IOSTANDARD LVCMOS25} [get_ports gp_out[5]] ; ## JX4.34 IO_L6N_T0_VREF_34
set_property -dict {PACKAGE_PIN T15 IOSTANDARD LVCMOS25} [get_ports gp_in[5]] ; ## JX4.33 IO_L5N_T0_34
set_property -dict {PACKAGE_PIN W14 IOSTANDARD LVCMOS25} [get_ports gp_out[6]] ; ## JX4.36 IO_L8P_T1_34
set_property -dict {PACKAGE_PIN Y16 IOSTANDARD LVCMOS25} [get_ports gp_in[6]] ; ## JX4.35 IO_L7P_T1_34
set_property -dict {PACKAGE_PIN U18 IOSTANDARD LVCMOS25} [get_ports gp_out[7]] ; ## JX4.46 IO_L12P_T1_MRCC_34
set_property -dict {PACKAGE_PIN U14 IOSTANDARD LVCMOS25} [get_ports gp_in[7]] ; ## JX4.45 IO_L11P_T1_SRCC_34
set_property -dict {PACKAGE_PIN U19 IOSTANDARD LVCMOS25} [get_ports gp_out[8]] ; ## JX4.48 IO_L12N_T1_MRCC_34
set_property -dict {PACKAGE_PIN U15 IOSTANDARD LVCMOS25} [get_ports gp_in[8]] ; ## JX4.47 IO_L11N_T1_SRCC_34
## p7
set_property -dict {PACKAGE_PIN N20 IOSTANDARD LVCMOS25} [get_ports gp_out[9]] ; ## JX4.52 IO_L14P_T2_SRCC_34
set_property -dict {PACKAGE_PIN N18 IOSTANDARD LVCMOS25} [get_ports gp_in[9]] ; ## JX4.51 IO_L13P_T2_MRCC_34
set_property -dict {PACKAGE_PIN P20 IOSTANDARD LVCMOS25} [get_ports gp_out[10]] ; ## JX4.54 IO_L14N_T2_SRCC_34
set_property -dict {PACKAGE_PIN P19 IOSTANDARD LVCMOS25} [get_ports gp_in[10]] ; ## JX4.53 IO_L13N_T2_MRCC_34
set_property -dict {PACKAGE_PIN V20 IOSTANDARD LVCMOS25} [get_ports gp_out[11]] ; ## JX4.58 IO_L16P_T2_34
set_property -dict {PACKAGE_PIN T20 IOSTANDARD LVCMOS25} [get_ports gp_in[11]] ; ## JX4.57 IO_L15P_T2_DQS_34
set_property -dict {PACKAGE_PIN W20 IOSTANDARD LVCMOS25} [get_ports gp_out[12]] ; ## JX4.60 IO_L16N_T2_34
set_property -dict {PACKAGE_PIN U20 IOSTANDARD LVCMOS25} [get_ports gp_in[12]] ; ## JX4.59 IO_L15N_T2_DQS_34
set_property -dict {PACKAGE_PIN T17 IOSTANDARD LVCMOS25} [get_ports gp_out[13]] ; ## JX4.74 IO_L20P_T3_34
set_property -dict {PACKAGE_PIN R16 IOSTANDARD LVCMOS25} [get_ports gp_in[13]] ; ## JX4.73 IO_L19P_T3_34
set_property -dict {PACKAGE_PIN R18 IOSTANDARD LVCMOS25} [get_ports gp_out[14]] ; ## JX4.76 IO_L20N_T3_34
set_property -dict {PACKAGE_PIN R17 IOSTANDARD LVCMOS25} [get_ports gp_in[14]] ; ## JX4.75 IO_L19N_T3_VREF_34
set_property -dict {PACKAGE_PIN W18 IOSTANDARD LVCMOS25} [get_ports gp_out[15]] ; ## JX4.78 IO_L22P_T3_34
set_property -dict {PACKAGE_PIN V17 IOSTANDARD LVCMOS25} [get_ports gp_in[15]] ; ## JX4.77 IO_L21P_T3_DQS_34
set_property -dict {PACKAGE_PIN W19 IOSTANDARD LVCMOS25} [get_ports gp_out[16]] ; ## JX4.80 IO_L22N_T3_34
set_property -dict {PACKAGE_PIN V18 IOSTANDARD LVCMOS25} [get_ports gp_in[16]] ; ## JX4.79 IO_L21N_T3_DQS_34
## p2
set_property -dict {PACKAGE_PIN T9 IOSTANDARD LVCMOS25} [get_ports gp_out[17]] ; ## JX2.36 IO_L12P_T1_MRCC_13
set_property -dict {PACKAGE_PIN U7 IOSTANDARD LVCMOS25} [get_ports gp_in[17]] ; ## JX2.35 IO_L11P_T1_SRCC_13
set_property -dict {PACKAGE_PIN U10 IOSTANDARD LVCMOS25} [get_ports gp_out[18]] ; ## JX2.38 IO_L12N_T1_MRCC_13
set_property -dict {PACKAGE_PIN V7 IOSTANDARD LVCMOS25} [get_ports gp_in[18]] ; ## JX2.37 IO_L11N_T1_SRCC_13
set_property -dict {PACKAGE_PIN Y9 IOSTANDARD LVCMOS25} [get_ports gp_out[19]] ; ## JX2.42 IO_L14P_T2_SRCC_13
set_property -dict {PACKAGE_PIN Y7 IOSTANDARD LVCMOS25} [get_ports gp_in[19]] ; ## JX2.41 IO_L13P_T2_MRCC_13
set_property -dict {PACKAGE_PIN Y8 IOSTANDARD LVCMOS25} [get_ports gp_out[20]] ; ## JX2.44 IO_L14N_T2_SRCC_13
set_property -dict {PACKAGE_PIN Y6 IOSTANDARD LVCMOS25} [get_ports gp_in[20]] ; ## JX2.43 IO_L13N_T2_MRCC_13
set_property -dict {PACKAGE_PIN W10 IOSTANDARD LVCMOS25} [get_ports gp_out[21]] ; ## JX2.48 IO_L16P_T2_13
set_property -dict {PACKAGE_PIN V8 IOSTANDARD LVCMOS25} [get_ports gp_in[21]] ; ## JX2.47 IO_L15P_T2_DQS_13
set_property -dict {PACKAGE_PIN W9 IOSTANDARD LVCMOS25} [get_ports gp_out[22]] ; ## JX2.50 IO_L16N_T2_13
set_property -dict {PACKAGE_PIN W8 IOSTANDARD LVCMOS25} [get_ports gp_in[22]] ; ## JX2.49 IO_L15N_T2_DQS_13
set_property -dict {PACKAGE_PIN W11 IOSTANDARD LVCMOS25} [get_ports gp_out[23]] ; ## JX2.54 IO_L18P_T2_13
set_property -dict {PACKAGE_PIN U9 IOSTANDARD LVCMOS25} [get_ports gp_in[23]] ; ## JX2.53 IO_L17P_T2_13
set_property -dict {PACKAGE_PIN Y11 IOSTANDARD LVCMOS25} [get_ports gp_out[24]] ; ## JX2.56 IO_L18N_T2_13
set_property -dict {PACKAGE_PIN U8 IOSTANDARD LVCMOS25} [get_ports gp_in[24]] ; ## JX2.55 IO_L17N_T2_13
set_property -dict {PACKAGE_PIN Y12 IOSTANDARD LVCMOS25} [get_ports gp_out[25]] ; ## JX2.62 IO_L20P_T3_13
set_property -dict {PACKAGE_PIN T5 IOSTANDARD LVCMOS25} [get_ports gp_in[25]] ; ## JX2.61 IO_L19P_T3_13
set_property -dict {PACKAGE_PIN Y13 IOSTANDARD LVCMOS25} [get_ports gp_out[26]] ; ## JX2.64 IO_L20N_T3_13
set_property -dict {PACKAGE_PIN U5 IOSTANDARD LVCMOS25} [get_ports gp_in[26]] ; ## JX2.63 IO_L19N_T3_VREF_13
## vcc
set_property -dict {PACKAGE_PIN V5 IOSTANDARD LVCMOS25} [get_ports gp_in_open[0]] ; ## JX2.18 IO_L6N_T0_VREF_13
set_property -dict {PACKAGE_PIN V16 IOSTANDARD LVCMOS25} [get_ports gp_in_open[1]] ; ## JX4.68 IO_L18P_T2_34
set_property -dict {PACKAGE_PIN W16 IOSTANDARD LVCMOS25} [get_ports gp_in_open[2]] ; ## JX4.70 IO_L18N_T2_34
set_property -dict {PACKAGE_PIN V11 IOSTANDARD LVCMOS25} [get_ports gp_in_open[3]] ; ## JX2.67 IO_L21P_T3_DQS_13
set_property -dict {PACKAGE_PIN V10 IOSTANDARD LVCMOS25} [get_ports gp_in_open[4]] ; ## JX2.69 IO_L21N_T3_DQS_13
## MIO loopbacks (fixed-io)
## the following are connected to AD9361 GPIO
## JX4.86 A23 PS_MIO12_500_JX4 <==> JX4.2 NA AD9361_GPO1
## JX4.88 B26 PS_MIO11_500_JX4 <==> JX4.1 NA AD9361_GPO0
## JX4.91 B25 PS_MIO13_500_JX4 <==> JX4.3 NA AD9361_GPO2
## JX4.93 D23 PS_MIO14_500_JX4 <==> JX4.4 NA AD9361_GPO3
## the following are mio-to-mio loopback (excluding Push-Buttons to LED)
## JX4.92 E17 PS_MIO46_501_JX4 <==> JX4.94 B19 PS_MIO47_501_JX4
## the following are mio-to-pl loopback
## JX4.100 B20 PS_MIO51_501_JX4 <==> JX4.67 A9 IO_L17P_T2_34
## JX4.85 C24 PS_MIO15_500_JX4 <==> JX4.37 E5 IO_L7N_T1_34
## JX4.87 A25 PS_MIO10_500_JX4 <==> JX4.42 E6 IO_L10P_T1_34
set_property -dict {PACKAGE_PIN Y18 IOSTANDARD LVCMOS25} [get_ports gp_in_mio[0]] ; ## JX4.67 IO_L17P_T2_34
set_property -dict {PACKAGE_PIN Y17 IOSTANDARD LVCMOS25} [get_ports gp_in_mio[1]] ; ## JX4.37 IO_L7N_T1_34
set_property -dict {PACKAGE_PIN V15 IOSTANDARD LVCMOS25} [get_ports gp_in_mio[2]] ; ## JX4.42 IO_L10P_T1_34

15
projects/pzsdr1/ccbrk_lvds/system_project.tcl
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@ -3,15 +3,16 @@ source ../../scripts/adi_env.tcl
source $ad_hdl_dir/projects/scripts/adi_project.tcl source $ad_hdl_dir/projects/scripts/adi_project.tcl
source $ad_hdl_dir/projects/scripts/adi_board.tcl source $ad_hdl_dir/projects/scripts/adi_board.tcl
adi_project_create ccbrk_lvds_pzsdr1 set p_device "xc7z020clg400-1"
adi_project_files ccbrk_lvds_pzsdr1 [list \ adi_project_create pzsdr1_ccbrk_lvds
"system_top.v" \ adi_project_files pzsdr1_ccbrk_lvds [list \
"system_constr.xdc"\
"$ad_hdl_dir/library/xilinx/common/ad_iobuf.v" \ "$ad_hdl_dir/library/xilinx/common/ad_iobuf.v" \
"$ad_hdl_dir/projects/common/pzsdr1/pzsdr1_system_constr.xdc" \ "../common/pzsdr1_constr.xdc" \
"$ad_hdl_dir/projects/common/pzsdr1/pzsdr1_lvds_system_constr.xdc" ] "../common/pzsdr1_constr_lvds.xdc" \
"../common/ccbrk_constr.xdc" \
"system_top.v" ]
set_property is_enabled false [get_files *axi_gpreg_constr.xdc] set_property is_enabled false [get_files *axi_gpreg_constr.xdc]
adi_project_run ccbrk_lvds_pzsdr1 adi_project_run pzsdr1_ccbrk_lvds

202
projects/pzsdr1/ccbrk_lvds/system_top.v
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@ -39,147 +39,97 @@
module system_top ( module system_top (
ddr_addr, inout [14:0] ddr_addr,
ddr_ba, inout [ 2:0] ddr_ba,
ddr_cas_n, inout ddr_cas_n,
ddr_ck_n, inout ddr_ck_n,
ddr_ck_p, inout ddr_ck_p,
ddr_cke, inout ddr_cke,
ddr_cs_n, inout ddr_cs_n,
ddr_dm, inout [ 3:0] ddr_dm,
ddr_dq, inout [31:0] ddr_dq,
ddr_dqs_n, inout [ 3:0] ddr_dqs_n,
ddr_dqs_p, inout [ 3:0] ddr_dqs_p,
ddr_odt, inout ddr_odt,
ddr_ras_n, inout ddr_ras_n,
ddr_reset_n, inout ddr_reset_n,
ddr_we_n, inout ddr_we_n,
fixed_io_ddr_vrn, inout fixed_io_ddr_vrn,
fixed_io_ddr_vrp, inout fixed_io_ddr_vrp,
fixed_io_mio, inout [53:0] fixed_io_mio,
fixed_io_ps_clk, inout fixed_io_ps_clk,
fixed_io_ps_porb, inout fixed_io_ps_porb,
fixed_io_ps_srstb, inout fixed_io_ps_srstb,
iic_scl, inout iic_scl,
iic_sda, inout iic_sda,
gpio_bd, inout [10:0] gpio_bd,
rx_clk_in_p, input rx_clk_in_p,
rx_clk_in_n, input rx_clk_in_n,
rx_frame_in_p, input rx_frame_in_p,
rx_frame_in_n, input rx_frame_in_n,
rx_data_in_p, input [ 5:0] rx_data_in_p,
rx_data_in_n, input [ 5:0] rx_data_in_n,
tx_clk_out_p, output tx_clk_out_p,
tx_clk_out_n, output tx_clk_out_n,
tx_frame_out_p, output tx_frame_out_p,
tx_frame_out_n, output tx_frame_out_n,
tx_data_out_p, output [ 5:0] tx_data_out_p,
tx_data_out_n, output [ 5:0] tx_data_out_n,
enable, output enable,
txnrx, output txnrx,
clk_out, input clkout_in,
output clkout_out,
gpio_clksel, inout gpio_clksel,
gpio_resetb, inout gpio_resetb,
gpio_sync, inout gpio_sync,
gpio_en_agc, inout gpio_en_agc,
gpio_ctl, inout [ 3:0] gpio_ctl,
gpio_status, inout [ 7:0] gpio_status,
spi_csn, output spi_csn,
spi_clk, output spi_clk,
spi_mosi, output spi_mosi,
spi_miso, input spi_miso,
gp_out, output [27:0] gp_out,
gp_in, input [27:0] gp_in);
gp_in_mio,
gp_in_open);
inout [14:0] ddr_addr;
inout [ 2:0] ddr_ba;
inout ddr_cas_n;
inout ddr_ck_n;
inout ddr_ck_p;
inout ddr_cke;
inout ddr_cs_n;
inout [ 3:0] ddr_dm;
inout [31:0] ddr_dq;
inout [ 3:0] ddr_dqs_n;
inout [ 3:0] ddr_dqs_p;
inout ddr_odt;
inout ddr_ras_n;
inout ddr_reset_n;
inout ddr_we_n;
inout fixed_io_ddr_vrn;
inout fixed_io_ddr_vrp;
inout [53:0] fixed_io_mio;
inout fixed_io_ps_clk;
inout fixed_io_ps_porb;
inout fixed_io_ps_srstb;
inout iic_scl;
inout iic_sda;
inout [ 3:0] gpio_bd;
input rx_clk_in_p;
input rx_clk_in_n;
input rx_frame_in_p;
input rx_frame_in_n;
input [ 5:0] rx_data_in_p;
input [ 5:0] rx_data_in_n;
output tx_clk_out_p;
output tx_clk_out_n;
output tx_frame_out_p;
output tx_frame_out_n;
output [ 5:0] tx_data_out_p;
output [ 5:0] tx_data_out_n;
output enable;
output txnrx;
input clk_out;
inout gpio_clksel;
inout gpio_resetb;
inout gpio_sync;
inout gpio_en_agc;
inout [ 3:0] gpio_ctl;
inout [ 7:0] gpio_status;
output spi_csn;
output spi_clk;
output spi_mosi;
input spi_miso;
output [26:0] gp_out;
input [26:0] gp_in;
input [ 2:0] gp_in_mio;
input [ 4:0] gp_in_open;
// internal signals // internal signals
wire [63:0] gp_out_s; wire [31:0] gp_out_s;
wire [63:0] gp_in_s; wire [31:0] gp_in_s;
wire [63:0] gpio_i; wire [63:0] gpio_i;
wire [63:0] gpio_o; wire [63:0] gpio_o;
wire [63:0] gpio_t; wire [63:0] gpio_t;
// assignments // assignments
assign gp_out[26:0] = gp_out_s[26:0]; assign clkout_out = clkout_in;
assign gp_in_s[34:30] = gp_in_open; assign gp_out[27:0] = gp_out_s[27:0];
assign gp_in_s[29:27] = gp_in_mio; assign gp_in_s[31:28] = gp_out_s[31:28];
assign gp_in_s[26: 0] = gp_in; assign gp_in_s[27: 0] = gp_in[27:0];
// instantiations // board gpio - 31-0
assign gpio_i[31:11] = gpio_o[31:11];
ad_iobuf #(.DATA_WIDTH(11)) i_iobuf_bd (
.dio_t (gpio_t[10:0]),
.dio_i (gpio_o[10:0]),
.dio_o (gpio_i[10:0]),
.dio_p (gpio_bd));
// ad9361 gpio - 63-32
assign gpio_i[63:52] = gpio_o[63:52];
assign gpio_i[50:47] = gpio_o[50:47];
ad_iobuf #(.DATA_WIDTH(16)) i_iobuf ( ad_iobuf #(.DATA_WIDTH(16)) i_iobuf (
.dio_t ({gpio_t[51], gpio_t[46:32]}), .dio_t ({gpio_t[51], gpio_t[46:32]}),
@ -192,11 +142,7 @@ module system_top (
gpio_ctl, // 43:40 gpio_ctl, // 43:40
gpio_status})); // 39:32 gpio_status})); // 39:32
ad_iobuf #(.DATA_WIDTH(4)) i_iobuf_bd ( // instantiations
.dio_t (gpio_t[3:0]),
.dio_i (gpio_o[3:0]),
.dio_o (gpio_i[3:0]),
.dio_p (gpio_bd));
system_wrapper i_system_wrapper ( system_wrapper i_system_wrapper (
.ddr_addr (ddr_addr), .ddr_addr (ddr_addr),
@ -222,9 +168,7 @@ module system_top (
.fixed_io_ps_porb (fixed_io_ps_porb), .fixed_io_ps_porb (fixed_io_ps_porb),
.fixed_io_ps_srstb (fixed_io_ps_srstb), .fixed_io_ps_srstb (fixed_io_ps_srstb),
.gp_in_0 (gp_in_s[31:0]), .gp_in_0 (gp_in_s[31:0]),
.gp_in_1 (gp_in_s[63:32]),
.gp_out_0 (gp_out_s[31:0]), .gp_out_0 (gp_out_s[31:0]),
.gp_out_1 (gp_out_s[63:32]),
.gpio_i (gpio_i), .gpio_i (gpio_i),
.gpio_o (gpio_o), .gpio_o (gpio_o),
.gpio_t (gpio_t), .gpio_t (gpio_t),