From e7ea5dfa11b81b33747e78db1a2b375f16cce40e Mon Sep 17 00:00:00 2001 From: Istvan Csomortani Date: Fri, 7 Sep 2018 13:43:31 +0100 Subject: [PATCH] util_dacfifo: Align the dac_xfer_out to the first valid data --- library/util_dacfifo/util_dacfifo.v | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/library/util_dacfifo/util_dacfifo.v b/library/util_dacfifo/util_dacfifo.v index 834f9d6e1..431e6d996 100644 --- a/library/util_dacfifo/util_dacfifo.v +++ b/library/util_dacfifo/util_dacfifo.v @@ -234,7 +234,8 @@ module util_dacfifo #( dac_lastaddr <= dac_lastaddr_g2b_s; dac_xfer_out_fifo_m1 <= dma_xfer_out_fifo; dac_xfer_out_fifo <= dac_xfer_out_fifo_m1; - dac_xfer_out_fifo_d <= dac_xfer_out_fifo; // read consume at least one clock cycle + if (dac_valid) + dac_xfer_out_fifo_d <= dac_xfer_out_fifo; end end