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projects/ad6676-adrv9371: xcvr updates

main
Rejeesh Kutty 2016-11-23 11:06:22 -05:00
parent daa3df4b96
commit e5d3bae54d
2 changed files with 48 additions and 19 deletions
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53
projects/ad6676evb/common/ad6676evb_bd.tcl
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@ -31,32 +31,47 @@ set_property -dict [list CONFIG.DMA_DATA_WIDTH_DEST {64}] $axi_ad6676_dma
# transceiver core
set util_ad6676_xcvr [create_bd_cell -type ip -vlnv analog.com:user:util_adxcvr:1.0 util_ad6676_xcvr]
set_property -dict [list CONFIG.RX_NUM_OF_LANES {2}] $util_ad6676_xcvr
set_property -dict [list CONFIG.QPLL_FBDIV {"0010000000"}] $util_ad6676_xcvr
set_property -dict [list CONFIG.CPLL_FBDIV {2}] $util_ad6676_xcvr
set_property -dict [list CONFIG.TX_NUM_OF_LANES {0}] $util_ad6676_xcvr
set_property -dict [list CONFIG.TX_OUT_DIV {1}] $util_ad6676_xcvr
set_property -dict [list CONFIG.TX_CLK25_DIV {10}] $util_ad6676_xcvr
set_property -dict [list CONFIG.RX_NUM_OF_LANES {2}] $util_ad6676_xcvr
set_property -dict [list CONFIG.RX_OUT_DIV {1}] $util_ad6676_xcvr
set_property -dict [list CONFIG.RX_CLK25_DIV {10}] $util_ad6676_xcvr
set_property -dict [list CONFIG.RX_DFE_LPM_CFG {0x0904}] $util_ad6676_xcvr
set_property -dict [list CONFIG.RX_CDR_CFG {0x03000023ff10200020}] $util_ad6676_xcvr
# reference clocks & resets
create_bd_port -dir I rx_ref_clk_0
ad_xcvrpll rx_ref_clk_0 util_ad6676_xcvr/qpll_ref_clk_*
ad_xcvrpll rx_ref_clk_0 util_ad6676_xcvr/cpll_ref_clk_*
ad_xcvrpll axi_ad6676_xcvr/up_pll_rst util_ad6676_xcvr/up_qpll_rst_*
ad_xcvrpll axi_ad6676_xcvr/up_pll_rst util_ad6676_xcvr/up_cpll_rst_*
ad_connect sys_cpu_resetn util_ad6676_xcvr/up_rstn
ad_connect sys_cpu_clk util_ad6676_xcvr/up_clk
# connections (adc)
ad_xcvrcon util_ad6676_xcvr axi_ad6676_xcvr axi_ad6676_jesd
ad_connect util_ad6676_xcvr/rx_out_clk_0 axi_ad6676_core/rx_clk
ad_connect axi_ad6676_jesd/rx_start_of_frame axi_ad6676_core/rx_sof
ad_connect axi_ad6676_jesd/rx_tdata axi_ad6676_core/rx_data
ad_connect util_ad6676_xcvr/rx_out_clk_0 axi_ad6676_cpack/adc_clk
ad_connect axi_ad6676_jesd_rstgen/peripheral_reset axi_ad6676_cpack/adc_rst
ad_connect axi_ad6676_core/adc_enable_0 axi_ad6676_cpack/adc_enable_0
ad_connect axi_ad6676_core/adc_valid_0 axi_ad6676_cpack/adc_valid_0
ad_connect axi_ad6676_core/adc_data_0 axi_ad6676_cpack/adc_data_0
ad_connect axi_ad6676_core/adc_enable_1 axi_ad6676_cpack/adc_enable_1
ad_connect axi_ad6676_core/adc_valid_1 axi_ad6676_cpack/adc_valid_1
ad_connect axi_ad6676_core/adc_data_1 axi_ad6676_cpack/adc_data_1
ad_connect axi_ad6676_core/adc_clk axi_ad6676_dma/fifo_wr_clk
ad_connect axi_ad6676_dma/fifo_wr_en axi_ad6676_cpack/adc_valid
ad_connect axi_ad6676_dma/fifo_wr_sync axi_ad6676_cpack/adc_sync
ad_connect axi_ad6676_dma/fifo_wr_din axi_ad6676_cpack/adc_data
ad_connect axi_ad6676_core/adc_dovf axi_ad6676_dma/fifo_wr_overflow
ad_xcvrcon util_ad6676_xcvr axi_ad6676_xcvr axi_ad6676_jesd
ad_connect util_ad6676_xcvr/rx_out_clk_0 axi_ad6676_core/rx_clk
ad_connect axi_ad6676_jesd/rx_start_of_frame axi_ad6676_core/rx_sof
ad_connect axi_ad6676_jesd/rx_tdata axi_ad6676_core/rx_data
ad_connect util_ad6676_xcvr/rx_out_clk_0 axi_ad6676_cpack/adc_clk
ad_connect axi_ad6676_jesd_rstgen/peripheral_reset axi_ad6676_cpack/adc_rst
ad_connect axi_ad6676_core/adc_enable_0 axi_ad6676_cpack/adc_enable_0
ad_connect axi_ad6676_core/adc_valid_0 axi_ad6676_cpack/adc_valid_0
ad_connect axi_ad6676_core/adc_data_0 axi_ad6676_cpack/adc_data_0
ad_connect axi_ad6676_core/adc_enable_1 axi_ad6676_cpack/adc_enable_1
ad_connect axi_ad6676_core/adc_valid_1 axi_ad6676_cpack/adc_valid_1
ad_connect axi_ad6676_core/adc_data_1 axi_ad6676_cpack/adc_data_1
ad_connect axi_ad6676_core/adc_clk axi_ad6676_dma/fifo_wr_clk
ad_connect axi_ad6676_dma/fifo_wr_en axi_ad6676_cpack/adc_valid
ad_connect axi_ad6676_dma/fifo_wr_sync axi_ad6676_cpack/adc_sync
ad_connect axi_ad6676_dma/fifo_wr_din axi_ad6676_cpack/adc_data
ad_connect axi_ad6676_core/adc_dovf axi_ad6676_dma/fifo_wr_overflow
# interconnect (cpu)

14
projects/adrv9371x/common/adrv9371x_bd.tcl
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@ -124,6 +124,20 @@ set_property -dict [list CONFIG.QPLL_FBDIV {"0100100000"}] $util_ad9371_xcvr
# xcvr interfaces
create_bd_port -dir I tx_ref_clk_0
create_bd_port -dir I rx_ref_clk_0
create_bd_port -dir I rx_ref_clk_2
ad_xcvrpll tx_ref_clk_0 util_ad9371_xcvr/qpll_ref_clk_0
ad_xcvrpll rx_ref_clk_0 util_ad9371_xcvr/cpll_ref_clk_0
ad_xcvrpll rx_ref_clk_0 util_ad9371_xcvr/cpll_ref_clk_1
ad_xcvrpll rx_ref_clk_2 util_ad9371_xcvr/cpll_ref_clk_2
ad_xcvrpll rx_ref_clk_2 util_ad9371_xcvr/cpll_ref_clk_3
ad_xcvrpll axi_ad9371_tx_xcvr/up_pll_rst util_ad9371_xcvr/up_qpll_rst_0
ad_xcvrpll axi_ad9371_rx_xcvr/up_pll_rst util_ad9371_xcvr/up_cpll_rst_0
ad_xcvrpll axi_ad9371_rx_xcvr/up_pll_rst util_ad9371_xcvr/up_cpll_rst_1
ad_xcvrpll axi_ad9371_rx_os_xcvr/up_pll_rst util_ad9371_xcvr/up_cpll_rst_2
ad_xcvrpll axi_ad9371_rx_os_xcvr/up_pll_rst util_ad9371_xcvr/up_cpll_rst_3
ad_connect sys_cpu_resetn util_ad9371_xcvr/up_rstn
ad_connect sys_cpu_clk util_ad9371_xcvr/up_clk