From e59e1336634544853dc3c8d0482117ee379a4eef Mon Sep 17 00:00:00 2001 From: Laszlo Nagy Date: Mon, 8 Apr 2019 15:44:53 +0100 Subject: [PATCH] util_dacfifo: set OOC default clock constraints Out of Context constraints are needed for timing driven synthesis as for avoiding critical warnings due clock queries. The memory from the FIFO is inferred in different ways for high clock speeds. Assume the highest frequency for all projects. --- library/util_dacfifo/Makefile | 1 + library/util_dacfifo/util_dacfifo_ip.tcl | 4 ++++ library/util_dacfifo/util_dacfifo_ooc.ttcl | 17 +++++++++++++++++ 3 files changed, 22 insertions(+) create mode 100644 library/util_dacfifo/util_dacfifo_ooc.ttcl diff --git a/library/util_dacfifo/Makefile b/library/util_dacfifo/Makefile index 2083b53a3..dc01e612f 100644 --- a/library/util_dacfifo/Makefile +++ b/library/util_dacfifo/Makefile @@ -13,6 +13,7 @@ GENERIC_DEPS += util_dacfifo.v GENERIC_DEPS += util_dacfifo_bypass.v XILINX_DEPS += util_dacfifo_constr.xdc +XILINX_DEPS += util_dacfifo_ooc.ttcl XILINX_DEPS += util_dacfifo_ip.tcl ALTERA_DEPS += util_dacfifo_constr.sdc diff --git a/library/util_dacfifo/util_dacfifo_ip.tcl b/library/util_dacfifo/util_dacfifo_ip.tcl index ab9af27ec..2b578a9d2 100644 --- a/library/util_dacfifo/util_dacfifo_ip.tcl +++ b/library/util_dacfifo/util_dacfifo_ip.tcl @@ -11,10 +11,14 @@ adi_ip_files util_dacfifo [list \ "$ad_hdl_dir/library/common/ad_g2b.v" \ "util_dacfifo.v" \ "util_dacfifo_bypass.v" \ + "util_dacfifo_ooc.ttcl" \ "util_dacfifo_constr.xdc"] + adi_ip_properties_lite util_dacfifo +adi_ip_ttcl util_dacfifo "util_dacfifo_ooc.ttcl" + ipx::infer_bus_interface dma_clk xilinx.com:signal:clock_rtl:1.0 [ipx::current_core] ipx::infer_bus_interface dma_rst xilinx.com:signal:reset_rtl:1.0 [ipx::current_core] ipx::infer_bus_interface dac_clk xilinx.com:signal:clock_rtl:1.0 [ipx::current_core] diff --git a/library/util_dacfifo/util_dacfifo_ooc.ttcl b/library/util_dacfifo/util_dacfifo_ooc.ttcl new file mode 100644 index 000000000..89a07befc --- /dev/null +++ b/library/util_dacfifo/util_dacfifo_ooc.ttcl @@ -0,0 +1,17 @@ + +<: setFileUsedIn { out_of_context synthesis implementation } :> +<: ;#Component and file information :> +<: set ComponentName [getComponentNameString] :> +<: setOutputDirectory "./" :> +<: setFileName $ComponentName :> +<: setFileExtension "_ooc.xdc" :> + +# This XDC is used only for OOC mode of synthesis, implementation. +# These are default values for timing driven synthesis during OOC flow. +# These values will be overwritten during implementation with information +# from top level. + +create_clock -name dma_clk -period 8 [get_ports dma_clk] +create_clock -name dac_clk -period 3.2 [get_ports dac_clk] + +################################################################################