arradio- updates
parent
68329de738
commit
e345953bdd
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@ -9,17 +9,20 @@
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categories="System" />
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categories="System" />
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<parameter name="bonusData"><![CDATA[bonusData
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<parameter name="bonusData"><![CDATA[bonusData
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{
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{
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element adc_pack
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element arradio_bd
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{
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{
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datum _sortIndex
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datum _originalDeviceFamily
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{
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{
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value = "5";
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value = "Cyclone V";
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type = "int";
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type = "String";
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}
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}
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datum sopceditor_expanded
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}
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element arradio_bd
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{
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datum _originalDeviceFamily
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{
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{
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value = "1";
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value = "Cyclone V";
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type = "boolean";
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type = "String";
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}
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}
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}
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}
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element arradio_bd
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element arradio_bd
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@ -99,11 +102,11 @@
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type = "String";
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type = "String";
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}
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}
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}
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}
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element axi_dmac_adc
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element axi_adc_dma
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{
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{
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datum _sortIndex
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datum _sortIndex
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{
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{
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value = "6";
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value = "7";
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type = "int";
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type = "int";
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}
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}
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datum sopceditor_expanded
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datum sopceditor_expanded
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@ -112,7 +115,7 @@
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type = "boolean";
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type = "boolean";
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}
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}
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}
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}
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element axi_dmac_adc.s_axi
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element axi_adc_dma.s_axi
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{
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{
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datum baseAddress
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datum baseAddress
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{
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{
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@ -124,7 +127,7 @@
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{
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{
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datum _sortIndex
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datum _sortIndex
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{
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{
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value = "8";
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value = "9";
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type = "int";
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type = "int";
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}
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}
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datum sopceditor_expanded
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datum sopceditor_expanded
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@ -145,7 +148,7 @@
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{
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{
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datum _sortIndex
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datum _sortIndex
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{
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{
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value = "7";
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value = "8";
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type = "int";
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type = "int";
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}
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}
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datum sopceditor_expanded
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datum sopceditor_expanded
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@ -158,7 +161,7 @@
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{
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{
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datum _sortIndex
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datum _sortIndex
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{
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{
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value = "10";
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value = "11";
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type = "int";
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type = "int";
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}
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}
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}
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}
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@ -182,7 +185,7 @@
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{
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{
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datum _sortIndex
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datum _sortIndex
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{
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{
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value = "9";
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value = "10";
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type = "int";
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type = "int";
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}
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}
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datum sopceditor_expanded
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datum sopceditor_expanded
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@ -215,6 +218,27 @@
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type = "int";
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type = "int";
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}
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}
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}
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}
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element util_adc_pack
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{
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datum _sortIndex
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{
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value = "6";
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type = "int";
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}
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datum sopceditor_expanded
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{
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value = "1";
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type = "boolean";
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}
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}
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element util_adc_wfifo
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{
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datum _sortIndex
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{
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value = "5";
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type = "int";
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}
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}
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}
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}
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]]></parameter>
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]]></parameter>
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<parameter name="clockCrossingAdapter" value="FIFO" />
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<parameter name="clockCrossingAdapter" value="FIFO" />
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@ -264,21 +288,21 @@
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dir="end" />
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dir="end" />
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<interface
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<interface
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name="axi_dmac_adc_fifo_wr_clock"
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name="axi_dmac_adc_fifo_wr_clock"
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internal="axi_dmac_adc.fifo_wr_clock" />
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internal="axi_adc_dma.fifo_wr_clock" />
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<interface name="axi_dmac_adc_fifo_wr_if" internal="axi_dmac_adc.fifo_wr_if" />
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<interface name="axi_dmac_adc_fifo_wr_if" internal="axi_adc_dma.fifo_wr_if" />
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<interface
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<interface
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name="axi_dmac_adc_intr"
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name="axi_dmac_adc_intr"
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internal="axi_dmac_adc.interrupt_sender"
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internal="axi_adc_dma.interrupt_sender"
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type="interrupt"
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type="interrupt"
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dir="end" />
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dir="end" />
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<interface
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<interface
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name="axi_dmac_adc_m_dest_axi"
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name="axi_dmac_adc_m_dest_axi"
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internal="axi_dmac_adc.m_dest_axi"
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internal="axi_adc_dma.m_dest_axi"
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type="axi4"
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type="axi4"
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dir="start" />
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dir="start" />
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<interface
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<interface
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name="axi_dmac_adc_s_axi"
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name="axi_dmac_adc_s_axi"
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internal="axi_dmac_adc.s_axi"
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internal="axi_adc_dma.s_axi"
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type="axi4lite"
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type="axi4lite"
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dir="end" />
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dir="end" />
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<interface
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<interface
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@ -325,10 +349,6 @@
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dir="end" />
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dir="end" />
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<interface name="sys_clk" internal="sys_clk.in_clk" type="clock" dir="end" />
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<interface name="sys_clk" internal="sys_clk.in_clk" type="clock" dir="end" />
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<interface name="sys_rst" internal="sys_rst.in_reset" type="reset" dir="end" />
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<interface name="sys_rst" internal="sys_rst.in_reset" type="reset" dir="end" />
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<module name="adc_pack" kind="util_cpack" version="1.0" enabled="1">
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<parameter name="CHANNEL_DATA_WIDTH" value="16" />
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<parameter name="NUM_OF_CHANNELS" value="4" />
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</module>
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<module name="axi_ad9361" kind="axi_ad9361" version="1.0" enabled="1">
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<module name="axi_ad9361" kind="axi_ad9361" version="1.0" enabled="1">
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<parameter name="ADC_DATAPATH_DISABLE" value="0" />
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<parameter name="ADC_DATAPATH_DISABLE" value="0" />
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<parameter name="CMOS_OR_LVDS_N" value="0" />
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<parameter name="CMOS_OR_LVDS_N" value="0" />
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@ -337,7 +357,7 @@
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<parameter name="DEVICE_TYPE" value="1" />
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<parameter name="DEVICE_TYPE" value="1" />
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<parameter name="ID" value="0" />
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<parameter name="ID" value="0" />
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</module>
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</module>
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<module name="axi_dmac_adc" kind="axi_dmac" version="1.0" enabled="1">
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<module name="axi_adc_dma" kind="axi_dmac" version="1.0" enabled="1">
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<parameter name="ASYNC_CLK_DEST_REQ" value="1" />
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<parameter name="ASYNC_CLK_DEST_REQ" value="1" />
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<parameter name="ASYNC_CLK_REQ_SRC" value="1" />
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<parameter name="ASYNC_CLK_REQ_SRC" value="1" />
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<parameter name="ASYNC_CLK_SRC_DEST" value="1" />
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<parameter name="ASYNC_CLK_SRC_DEST" value="1" />
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@ -429,11 +449,16 @@
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<parameter name="SYNCHRONOUS_EDGES" value="none" />
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<parameter name="SYNCHRONOUS_EDGES" value="none" />
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<parameter name="USE_RESET_REQUEST" value="0" />
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<parameter name="USE_RESET_REQUEST" value="0" />
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</module>
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</module>
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<connection
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<module name="util_adc_pack" kind="util_cpack" version="1.0" enabled="1">
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kind="clock"
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<parameter name="CHANNEL_DATA_WIDTH" value="16" />
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version="15.1"
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<parameter name="NUM_OF_CHANNELS" value="4" />
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start="axi_ad9361.if_l_clk"
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</module>
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end="adc_pack.if_adc_clk" />
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<module name="util_adc_wfifo" kind="util_wfifo" version="1.0" enabled="1">
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<parameter name="DIN_ADDRESS_WIDTH" value="8" />
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<parameter name="DIN_DATA_WIDTH" value="16" />
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<parameter name="DOUT_DATA_WIDTH" value="16" />
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<parameter name="NUM_OF_CHANNELS" value="4" />
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</module>
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<connection
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<connection
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kind="clock"
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kind="clock"
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version="15.1"
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version="15.1"
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@ -448,12 +473,12 @@
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kind="clock"
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kind="clock"
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version="15.1"
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version="15.1"
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start="axi_ad9361.if_l_clk"
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start="axi_ad9361.if_l_clk"
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end="axi_dmac_dac.if_fifo_rd_clk" />
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end="util_adc_wfifo.if_din_clk" />
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<connection
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<connection
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kind="clock"
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kind="clock"
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version="15.1"
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version="15.1"
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start="axi_ad9361.if_l_clk"
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start="axi_ad9361.if_l_clk"
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end="axi_dmac_adc.if_fifo_wr_clk" />
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end="axi_dmac_dac.if_fifo_rd_clk" />
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<connection
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<connection
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kind="clock"
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kind="clock"
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version="15.1"
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version="15.1"
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@ -464,7 +489,22 @@
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kind="clock"
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kind="clock"
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version="15.1"
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version="15.1"
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start="mem_clk.out_clk"
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start="mem_clk.out_clk"
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end="axi_dmac_adc.m_dest_axi_clock" />
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end="util_adc_pack.if_adc_clk" />
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<connection
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kind="clock"
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version="15.1"
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start="mem_clk.out_clk"
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end="util_adc_wfifo.if_dout_clk" />
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<connection
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kind="clock"
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version="15.1"
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start="mem_clk.out_clk"
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end="axi_adc_dma.if_fifo_wr_clk" />
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<connection
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kind="clock"
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version="15.1"
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start="mem_clk.out_clk"
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end="axi_adc_dma.m_dest_axi_clock" />
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<connection
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<connection
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kind="clock"
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kind="clock"
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version="15.1"
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version="15.1"
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@ -479,7 +519,7 @@
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kind="clock"
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kind="clock"
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version="15.1"
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version="15.1"
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start="sys_clk.out_clk"
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start="sys_clk.out_clk"
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end="axi_dmac_adc.s_axi_clock" />
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end="axi_adc_dma.s_axi_clock" />
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<connection
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<connection
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kind="clock"
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kind="clock"
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version="15.1"
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version="15.1"
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@ -488,8 +528,8 @@
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<connection
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<connection
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kind="conduit"
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kind="conduit"
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version="15.1"
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version="15.1"
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start="dac_upack.fifo_ch_0"
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start="axi_ad9361.adc_ch_0"
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end="axi_ad9361.fifo_ch_0_out">
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end="util_adc_wfifo.din_0">
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<parameter name="endPort" value="" />
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<parameter name="endPort" value="" />
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<parameter name="endPortLSB" value="0" />
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<parameter name="endPortLSB" value="0" />
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<parameter name="startPort" value="" />
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<parameter name="startPort" value="" />
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@ -499,8 +539,8 @@
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<connection
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<connection
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kind="conduit"
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kind="conduit"
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version="15.1"
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version="15.1"
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start="axi_ad9361.fifo_ch_0_in"
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start="axi_ad9361.adc_ch_1"
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end="adc_pack.fifo_ch_0">
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end="util_adc_wfifo.din_1">
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<parameter name="endPort" value="" />
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<parameter name="endPort" value="" />
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<parameter name="endPortLSB" value="0" />
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<parameter name="endPortLSB" value="0" />
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<parameter name="startPort" value="" />
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<parameter name="startPort" value="" />
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@ -510,8 +550,8 @@
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<connection
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<connection
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kind="conduit"
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kind="conduit"
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version="15.1"
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version="15.1"
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start="axi_ad9361.fifo_ch_1_in"
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start="util_adc_pack.adc_ch_1"
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end="adc_pack.fifo_ch_1">
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end="util_adc_wfifo.dout_1">
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<parameter name="endPort" value="" />
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<parameter name="endPort" value="" />
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<parameter name="endPortLSB" value="0" />
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<parameter name="endPortLSB" value="0" />
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<parameter name="startPort" value="" />
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<parameter name="startPort" value="" />
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@ -521,8 +561,8 @@
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<connection
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<connection
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kind="conduit"
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kind="conduit"
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version="15.1"
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version="15.1"
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start="axi_ad9361.fifo_ch_1_out"
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start="axi_ad9361.adc_ch_2"
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end="dac_upack.fifo_ch_1">
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end="util_adc_wfifo.din_2">
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<parameter name="endPort" value="" />
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<parameter name="endPort" value="" />
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<parameter name="endPortLSB" value="0" />
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<parameter name="endPortLSB" value="0" />
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<parameter name="startPort" value="" />
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<parameter name="startPort" value="" />
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@ -532,8 +572,8 @@
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<connection
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<connection
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kind="conduit"
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kind="conduit"
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version="15.1"
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version="15.1"
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start="axi_ad9361.fifo_ch_2_in"
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start="util_adc_pack.adc_ch_2"
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end="adc_pack.fifo_ch_2">
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end="util_adc_wfifo.dout_2">
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<parameter name="endPort" value="" />
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<parameter name="endPort" value="" />
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<parameter name="endPortLSB" value="0" />
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<parameter name="endPortLSB" value="0" />
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<parameter name="startPort" value="" />
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<parameter name="startPort" value="" />
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@ -543,8 +583,8 @@
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<connection
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<connection
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kind="conduit"
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kind="conduit"
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version="15.1"
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version="15.1"
|
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start="axi_ad9361.fifo_ch_2_out"
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start="axi_ad9361.adc_ch_3"
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end="dac_upack.fifo_ch_2">
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end="util_adc_wfifo.din_3">
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<parameter name="endPort" value="" />
|
<parameter name="endPort" value="" />
|
||||||
<parameter name="endPortLSB" value="0" />
|
<parameter name="endPortLSB" value="0" />
|
||||||
<parameter name="startPort" value="" />
|
<parameter name="startPort" value="" />
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@ -554,8 +594,8 @@
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<connection
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<connection
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kind="conduit"
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kind="conduit"
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version="15.1"
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version="15.1"
|
||||||
start="axi_ad9361.fifo_ch_3_in"
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start="util_adc_wfifo.dout_0"
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||||||
end="adc_pack.fifo_ch_3">
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end="util_adc_pack.adc_ch_0">
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<parameter name="endPort" value="" />
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<parameter name="endPort" value="" />
|
||||||
<parameter name="endPortLSB" value="0" />
|
<parameter name="endPortLSB" value="0" />
|
||||||
<parameter name="startPort" value="" />
|
<parameter name="startPort" value="" />
|
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@ -565,8 +605,8 @@
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<connection
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<connection
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kind="conduit"
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kind="conduit"
|
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version="15.1"
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version="15.1"
|
||||||
start="axi_ad9361.fifo_ch_3_out"
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start="util_adc_wfifo.dout_3"
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||||||
end="dac_upack.fifo_ch_3">
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end="util_adc_pack.adc_ch_3">
|
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<parameter name="endPort" value="" />
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<parameter name="endPort" value="" />
|
||||||
<parameter name="endPortLSB" value="0" />
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<parameter name="endPortLSB" value="0" />
|
||||||
<parameter name="startPort" value="" />
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<parameter name="startPort" value="" />
|
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@ -576,8 +616,8 @@
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<connection
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<connection
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kind="conduit"
|
kind="conduit"
|
||||||
version="15.1"
|
version="15.1"
|
||||||
start="adc_pack.if_adc_data"
|
start="util_adc_pack.if_adc_data"
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||||||
end="axi_dmac_adc.if_fifo_wr_din">
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end="axi_adc_dma.if_fifo_wr_din">
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<parameter name="endPort" value="" />
|
<parameter name="endPort" value="" />
|
||||||
<parameter name="endPortLSB" value="0" />
|
<parameter name="endPortLSB" value="0" />
|
||||||
<parameter name="startPort" value="" />
|
<parameter name="startPort" value="" />
|
||||||
|
@ -587,8 +627,8 @@
|
||||||
<connection
|
<connection
|
||||||
kind="conduit"
|
kind="conduit"
|
||||||
version="15.1"
|
version="15.1"
|
||||||
start="adc_pack.if_adc_sync"
|
start="util_adc_pack.if_adc_sync"
|
||||||
end="axi_dmac_adc.if_fifo_wr_sync">
|
end="axi_adc_dma.if_fifo_wr_sync">
|
||||||
<parameter name="endPort" value="" />
|
<parameter name="endPort" value="" />
|
||||||
<parameter name="endPortLSB" value="0" />
|
<parameter name="endPortLSB" value="0" />
|
||||||
<parameter name="startPort" value="" />
|
<parameter name="startPort" value="" />
|
||||||
|
@ -598,8 +638,8 @@
|
||||||
<connection
|
<connection
|
||||||
kind="conduit"
|
kind="conduit"
|
||||||
version="15.1"
|
version="15.1"
|
||||||
start="adc_pack.if_adc_valid"
|
start="util_adc_pack.if_adc_valid"
|
||||||
end="axi_dmac_adc.if_fifo_wr_en">
|
end="axi_adc_dma.if_fifo_wr_en">
|
||||||
<parameter name="endPort" value="" />
|
<parameter name="endPort" value="" />
|
||||||
<parameter name="endPortLSB" value="0" />
|
<parameter name="endPortLSB" value="0" />
|
||||||
<parameter name="startPort" value="" />
|
<parameter name="startPort" value="" />
|
||||||
|
@ -650,37 +690,26 @@
|
||||||
<parameter name="startPortLSB" value="0" />
|
<parameter name="startPortLSB" value="0" />
|
||||||
<parameter name="width" value="0" />
|
<parameter name="width" value="0" />
|
||||||
</connection>
|
</connection>
|
||||||
<connection
|
|
||||||
kind="conduit"
|
|
||||||
version="15.1"
|
|
||||||
start="axi_dmac_adc.if_fifo_wr_overflow"
|
|
||||||
end="axi_ad9361.if_adc_dovf">
|
|
||||||
<parameter name="endPort" value="" />
|
|
||||||
<parameter name="endPortLSB" value="0" />
|
|
||||||
<parameter name="startPort" value="" />
|
|
||||||
<parameter name="startPortLSB" value="0" />
|
|
||||||
<parameter name="width" value="0" />
|
|
||||||
</connection>
|
|
||||||
<connection
|
<connection
|
||||||
kind="reset"
|
kind="reset"
|
||||||
version="15.1"
|
version="15.1"
|
||||||
start="axi_ad9361.if_rst"
|
start="axi_ad9361.if_rst"
|
||||||
end="adc_pack.if_adc_rst" />
|
end="util_adc_wfifo.if_din_rst" />
|
||||||
<connection
|
|
||||||
kind="reset"
|
|
||||||
version="15.1"
|
|
||||||
start="sys_rst.out_reset"
|
|
||||||
end="adc_pack.if_adc_rst" />
|
|
||||||
<connection
|
<connection
|
||||||
kind="reset"
|
kind="reset"
|
||||||
version="15.1"
|
version="15.1"
|
||||||
start="mem_rst.out_reset"
|
start="mem_rst.out_reset"
|
||||||
end="adc_pack.if_adc_rst" />
|
end="util_adc_pack.if_adc_rst" />
|
||||||
<connection
|
<connection
|
||||||
kind="reset"
|
kind="reset"
|
||||||
version="15.1"
|
version="15.1"
|
||||||
start="mem_rst.out_reset"
|
start="mem_rst.out_reset"
|
||||||
end="axi_dmac_adc.m_dest_axi_reset" />
|
end="util_adc_wfifo.if_dout_rstn" />
|
||||||
|
<connection
|
||||||
|
kind="reset"
|
||||||
|
version="15.1"
|
||||||
|
start="mem_rst.out_reset"
|
||||||
|
end="axi_adc_dma.m_dest_axi_reset" />
|
||||||
<connection
|
<connection
|
||||||
kind="reset"
|
kind="reset"
|
||||||
version="15.1"
|
version="15.1"
|
||||||
|
@ -705,7 +734,7 @@
|
||||||
kind="reset"
|
kind="reset"
|
||||||
version="15.1"
|
version="15.1"
|
||||||
start="sys_rst.out_reset"
|
start="sys_rst.out_reset"
|
||||||
end="axi_dmac_adc.s_axi_reset" />
|
end="axi_adc_dma.s_axi_reset" />
|
||||||
<connection
|
<connection
|
||||||
kind="reset"
|
kind="reset"
|
||||||
version="15.1"
|
version="15.1"
|
||||||
|
|
Loading…
Reference in New Issue