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base: Add system_processor_rst for all the global clocks

main
Istvan Csomortani 2019-05-29 07:16:36 +01:00 committed by István Csomortáni
parent 7960b00684
commit de510b45ab
10 changed files with 164 additions and 23 deletions
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22
projects/common/ac701/ac701_system_bd.tcl
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@ -64,6 +64,9 @@ ad_ip_parameter sys_mb_debug CONFIG.C_USE_UART 1
# instance: system reset/clocks # instance: system reset/clocks
ad_ip_instance proc_sys_reset sys_rstgen ad_ip_instance proc_sys_reset sys_rstgen
ad_ip_parameter sys_rstgen CONFIG.C_EXT_RST_WIDTH 1
ad_ip_instance proc_sys_reset sys_200m_rstgen
ad_ip_parameter sys_200m_rstgen CONFIG.C_EXT_RST_WIDTH 1
# instance: ddr (mig) # instance: ddr (mig)
@ -143,6 +146,7 @@ ad_connect sys_concat_intc/dout axi_intc/intr
# defaults (peripherals) # defaults (peripherals)
ad_connect axi_ddr_cntrl/mmcm_locked sys_rstgen/dcm_locked ad_connect axi_ddr_cntrl/mmcm_locked sys_rstgen/dcm_locked
ad_connect axi_ddr_cntrl/mmcm_locked sys_200m_rstgen/dcm_locked
ad_connect axi_ddr_cntrl/device_temp_i GND ad_connect axi_ddr_cntrl/device_temp_i GND
ad_connect sys_cpu_clk axi_ddr_cntrl/ui_clk ad_connect sys_cpu_clk axi_ddr_cntrl/ui_clk
@ -150,14 +154,24 @@ ad_connect sys_200m_clk axi_ddr_cntrl/ui_addn_clk_0
ad_connect sys_cpu_resetn axi_ddr_cntrl/aresetn ad_connect sys_cpu_resetn axi_ddr_cntrl/aresetn
ad_connect sys_cpu_reset sys_rstgen/peripheral_reset ad_connect sys_cpu_reset sys_rstgen/peripheral_reset
ad_connect sys_cpu_resetn sys_rstgen/peripheral_aresetn ad_connect sys_cpu_resetn sys_rstgen/peripheral_aresetn
ad_connect sys_200m_reset sys_200m_rstgen/peripheral_reset
ad_connect sys_200m_resetn sys_200m_rstgen/peripheral_aresetn
# generic system clocks pointers # generic system clocks and resets pointers
set sys_cpu_clk [get_bd_nets sys_cpu_clk] set sys_cpu_clk [get_bd_nets sys_cpu_clk]
set sys_dma_clk [get_bd_nets sys_200m_clk] set sys_dma_clk [get_bd_nets sys_200m_clk]
set sys_iodelay_clk [get_bd_nets sys_200m_clk] set sys_iodelay_clk [get_bd_nets sys_200m_clk]
set sys_cpu_reset [get_bd_nets sys_cpu_reset]
set sys_cpu_resetn [get_bd_nets sys_cpu_resetn]
set sys_dma_reset [get_bd_nets sys_200m_reset]
set sys_dma_resetn [get_bd_nets sys_200m_resetn]
set sys_iodelay_reset [get_bd_nets sys_200m_reset]
set sys_iodelay_resetn [get_bd_nets sys_200m_resetn]
ad_connect sys_cpu_clk sys_rstgen/slowest_sync_clk ad_connect sys_cpu_clk sys_rstgen/slowest_sync_clk
ad_connect sys_200m_clk sys_200m_rstgen/slowest_sync_clk
ad_connect sys_cpu_clk sys_mb/Clk ad_connect sys_cpu_clk sys_mb/Clk
ad_connect sys_cpu_clk sys_dlmb/LMB_Clk ad_connect sys_cpu_clk sys_dlmb/LMB_Clk
ad_connect sys_cpu_clk sys_ilmb/LMB_Clk ad_connect sys_cpu_clk sys_ilmb/LMB_Clk

16
projects/common/kc705/kc705_system_bd.tcl
View File

@ -68,6 +68,9 @@ ad_ip_parameter sys_mb_debug CONFIG.C_USE_UART 1
# instance: system reset/clocks # instance: system reset/clocks
ad_ip_instance proc_sys_reset sys_rstgen ad_ip_instance proc_sys_reset sys_rstgen
ad_ip_parameter sys_rstgen CONFIG.C_EXT_RST_WIDTH 1
ad_ip_instance proc_sys_reset sys_200m_rstgen
ad_ip_parameter sys_200m_rstgen CONFIG.C_EXT_RST_WIDTH 1
# instance: ddr (mig) # instance: ddr (mig)
@ -158,12 +161,15 @@ ad_connect sys_concat_intc/dout axi_intc/intr
# defaults (peripherals) # defaults (peripherals)
ad_connect axi_ddr_cntrl/mmcm_locked sys_rstgen/dcm_locked ad_connect axi_ddr_cntrl/mmcm_locked sys_rstgen/dcm_locked
ad_connect axi_ddr_cntrl/mmcm_locked sys_200m_rstgen/dcm_locked
ad_connect sys_cpu_clk axi_ddr_cntrl/ui_addn_clk_0 ad_connect sys_cpu_clk axi_ddr_cntrl/ui_addn_clk_0
ad_connect sys_200m_clk axi_ddr_cntrl/ui_clk ad_connect sys_200m_clk axi_ddr_cntrl/ui_clk
ad_connect sys_cpu_resetn axi_ddr_cntrl/aresetn ad_connect sys_cpu_resetn axi_ddr_cntrl/aresetn
ad_connect sys_cpu_reset sys_rstgen/peripheral_reset ad_connect sys_cpu_reset sys_rstgen/peripheral_reset
ad_connect sys_cpu_resetn sys_rstgen/peripheral_aresetn ad_connect sys_cpu_resetn sys_rstgen/peripheral_aresetn
ad_connect sys_200m_reset sys_200m_rstgen/peripheral_reset
ad_connect sys_200m_resetn sys_200m_rstgen/peripheral_aresetn
# generic system clocks pointers # generic system clocks pointers
@ -171,7 +177,15 @@ set sys_cpu_clk [get_bd_nets sys_cpu_clk]
set sys_dma_clk [get_bd_nets sys_200m_clk] set sys_dma_clk [get_bd_nets sys_200m_clk]
set sys_iodelay_clk [get_bd_nets sys_200m_clk] set sys_iodelay_clk [get_bd_nets sys_200m_clk]
set sys_cpu_reset [get_bd_nets sys_cpu_reset]
set sys_cpu_resetn [get_bd_nets sys_cpu_resetn]
set sys_dma_reset [get_bd_nets sys_200m_reset]
set sys_dma_resetn [get_bd_nets sys_200m_resetn]
set sys_iodelay_reset [get_bd_nets sys_200m_reset]
set sys_iodelay_resetn [get_bd_nets sys_200m_resetn]
ad_connect sys_cpu_clk sys_rstgen/slowest_sync_clk ad_connect sys_cpu_clk sys_rstgen/slowest_sync_clk
ad_connect sys_200m_clk sys_200m_rstgen/slowest_sync_clk
ad_connect sys_cpu_clk sys_mb/Clk ad_connect sys_cpu_clk sys_mb/Clk
ad_connect sys_cpu_clk sys_dlmb/LMB_Clk ad_connect sys_cpu_clk sys_dlmb/LMB_Clk
ad_connect sys_cpu_clk sys_ilmb/LMB_Clk ad_connect sys_cpu_clk sys_ilmb/LMB_Clk
@ -202,6 +216,8 @@ ad_connect sys_concat_intc/In15 GND
ad_connect sys_rst sys_rstgen/ext_reset_in ad_connect sys_rst sys_rstgen/ext_reset_in
ad_connect sys_rst axi_ddr_cntrl/sys_rst ad_connect sys_rst axi_ddr_cntrl/sys_rst
ad_connect sys_200m_rst sys_200m_rstgen/ext_reset_in
ad_connect sys_200m_rst axi_ddr_cntrl/ui_clk_sync_rst
ad_connect sys_clk_p axi_ddr_cntrl/sys_clk_p ad_connect sys_clk_p axi_ddr_cntrl/sys_clk_p
ad_connect sys_clk_n axi_ddr_cntrl/sys_clk_n ad_connect sys_clk_n axi_ddr_cntrl/sys_clk_n
ad_connect ddr3 axi_ddr_cntrl/DDR3 ad_connect ddr3 axi_ddr_cntrl/DDR3

24
projects/common/kcu105/kcu105_system_bd.tcl
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@ -67,6 +67,9 @@ ad_ip_parameter sys_mb_debug CONFIG.C_USE_UART 1
# instance: system reset/clocks # instance: system reset/clocks
ad_ip_instance proc_sys_reset sys_rstgen ad_ip_instance proc_sys_reset sys_rstgen
ad_ip_parameter sys_rstgen CONFIG.C_EXT_RST_WIDTH 1
ad_ip_instance proc_sys_reset sys_200m_rstgen
ad_ip_parameter sys_200m_rstgen CONFIG.C_EXT_RST_WIDTH 1
# instance: ddr4 # instance: ddr4
@ -127,6 +130,7 @@ ad_connect sys_rst axi_ddr_cntrl/sys_rst
ad_connect sys_clk axi_ddr_cntrl/C0_SYS_CLK ad_connect sys_clk axi_ddr_cntrl/C0_SYS_CLK
ad_connect c0_ddr4 axi_ddr_cntrl/C0_DDR4 ad_connect c0_ddr4 axi_ddr_cntrl/C0_DDR4
ad_connect axi_ddr_cntrl/c0_ddr4_ui_clk_sync_rst sys_rstgen/ext_reset_in ad_connect axi_ddr_cntrl/c0_ddr4_ui_clk_sync_rst sys_rstgen/ext_reset_in
ad_connect axi_ddr_cntrl/c0_ddr4_ui_clk_sync_rst sys_200m_rstgen/ext_reset_in
ad_connect axi_ddr_cntrl/c0_ddr4_ui_clk_sync_rst axi_ddr_cntrl_rstgen/ext_reset_in ad_connect axi_ddr_cntrl/c0_ddr4_ui_clk_sync_rst axi_ddr_cntrl_rstgen/ext_reset_in
ad_connect sys_mem_clk axi_ddr_cntrl/c0_ddr4_ui_clk ad_connect sys_mem_clk axi_ddr_cntrl/c0_ddr4_ui_clk
ad_connect sys_mem_clk axi_ddr_cntrl_rstgen/slowest_sync_clk ad_connect sys_mem_clk axi_ddr_cntrl_rstgen/slowest_sync_clk
@ -135,17 +139,27 @@ ad_connect sys_cpu_clk sys_rstgen/slowest_sync_clk
ad_connect sys_mem_resetn axi_ddr_cntrl_rstgen/peripheral_aresetn ad_connect sys_mem_resetn axi_ddr_cntrl_rstgen/peripheral_aresetn
ad_connect sys_mem_resetn axi_ddr_cntrl/c0_ddr4_aresetn ad_connect sys_mem_resetn axi_ddr_cntrl/c0_ddr4_aresetn
ad_connect sys_200m_clk axi_ddr_cntrl/addn_ui_clkout2 ad_connect sys_200m_clk axi_ddr_cntrl/addn_ui_clkout2
ad_connect sys_200m_clk sys_200m_rstgen/slowest_sync_clk
ad_connect sys_cpu_reset sys_rstgen/peripheral_reset
ad_connect sys_cpu_resetn sys_rstgen/peripheral_aresetn
ad_connect sys_200m_reset sys_200m_rstgen/peripheral_reset
ad_connect sys_200m_resetn sys_200m_rstgen/peripheral_aresetn
# generic system clocks pointers # generic system clocks pointers
set sys_cpu_clk [get_bd_nets sys_cpu_clk] set sys_cpu_clk [get_bd_nets sys_cpu_clk]
set sys_dma_clk [get_bd_nets sys_200m_clk] set sys_dma_clk [get_bd_nets sys_200m_clk]
set sys_iodelay_clk [get_bd_nets sys_200m_clk] set sys_iodelay_clk [get_bd_nets sys_200m_clk]
set sys_cpu_reset [get_bd_nets sys_cpu_reset]
set sys_cpu_resetn [get_bd_nets sys_cpu_resetn]
set sys_dma_reset [get_bd_nets sys_200m_reset]
set sys_dma_resetn [get_bd_nets sys_200m_resetn]
set sys_iodelay_reset [get_bd_nets sys_200m_reset]
set sys_iodelay_resetn [get_bd_nets sys_200m_resetn]
# microblaze # microblaze
ad_connect sys_cpu_reset sys_rstgen/peripheral_reset
ad_connect sys_cpu_resetn sys_rstgen/peripheral_aresetn
ad_connect sys_cpu_clk sys_mb/Clk ad_connect sys_cpu_clk sys_mb/Clk
ad_connect sys_cpu_clk sys_dlmb/LMB_Clk ad_connect sys_cpu_clk sys_dlmb/LMB_Clk
ad_connect sys_cpu_clk sys_ilmb/LMB_Clk ad_connect sys_cpu_clk sys_ilmb/LMB_Clk

19
projects/common/microzed/microzed_system_bd.tcl
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@ -51,6 +51,8 @@ ad_ip_parameter sys_concat_intc CONFIG.NUM_PORTS 16
ad_ip_instance proc_sys_reset sys_rstgen ad_ip_instance proc_sys_reset sys_rstgen
ad_ip_parameter sys_rstgen CONFIG.C_EXT_RST_WIDTH 1 ad_ip_parameter sys_rstgen CONFIG.C_EXT_RST_WIDTH 1
ad_ip_instance proc_sys_reset sys_200m_rstgen
ad_ip_parameter sys_200m_rstgen CONFIG.C_EXT_RST_WIDTH 1
# system reset/clock definitions # system reset/clock definitions
@ -60,12 +62,23 @@ ad_connect sys_cpu_reset sys_rstgen/peripheral_reset
ad_connect sys_cpu_resetn sys_rstgen/peripheral_aresetn ad_connect sys_cpu_resetn sys_rstgen/peripheral_aresetn
ad_connect sys_cpu_clk sys_rstgen/slowest_sync_clk ad_connect sys_cpu_clk sys_rstgen/slowest_sync_clk
ad_connect sys_rstgen/ext_reset_in sys_ps7/FCLK_RESET0_N ad_connect sys_rstgen/ext_reset_in sys_ps7/FCLK_RESET0_N
ad_connect sys_200m_reset sys_200m_rstgen/peripheral_reset
ad_connect sys_200m_resetn sys_200m_rstgen/peripheral_aresetn
ad_connect sys_200m_clk sys_200m_rstgen/slowest_sync_clk
ad_connect sys_200m_rstgen/ext_reset_in sys_ps7/FCLK_RESET1_N
# generic system clocks pointers # generic system clocks pointers
set sys_cpu_clk [get_bd_nets sys_cpu_clk] set sys_cpu_clk [get_bd_nets sys_cpu_clk]
set sys_dma_clk [get_bd_nets sys_200m_clk] set sys_dma_clk [get_bd_nets sys_200m_clk]
set sys_iodelay_clk [get_bd_nets sys_200m_clk] set sys_iodelay_clk [get_bd_nets sys_200m_clk]
set sys_cpu_reset [get_bd_nets sys_cpu_reset]
set sys_cpu_resetn [get_bd_nets sys_cpu_resetn]
set sys_dma_reset [get_bd_nets sys_200m_reset]
set sys_dma_resetn [get_bd_nets sys_200m_resetn]
set sys_iodelay_reset [get_bd_nets sys_200m_reset]
set sys_iodelay_resetn [get_bd_nets sys_200m_resetn]
# interface connections # interface connections

9
projects/common/vc707/vc707_system_bd.tcl
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@ -66,6 +66,9 @@ ad_ip_parameter sys_mb_debug CONFIG.C_USE_UART 1
# instance: system reset/clocks # instance: system reset/clocks
ad_ip_instance proc_sys_reset sys_rstgen ad_ip_instance proc_sys_reset sys_rstgen
ad_ip_parameter sys_rstgen CONFIG.C_EXT_RST_WIDTH 1
ad_ip_instance proc_sys_reset sys_200m_rstgen
ad_ip_parameter sys_200m_rstgen CONFIG.C_EXT_RST_WIDTH 1
# instance: ddr (mig) # instance: ddr (mig)
@ -164,12 +167,15 @@ ad_connect sys_concat_intc/dout axi_intc/intr
ad_connect axi_ddr_cntrl/device_temp_i GND ad_connect axi_ddr_cntrl/device_temp_i GND
ad_connect axi_ddr_cntrl/mmcm_locked sys_rstgen/dcm_locked ad_connect axi_ddr_cntrl/mmcm_locked sys_rstgen/dcm_locked
ad_connect axi_ddr_cntrl/mmcm_locked sys_200m_rstgen/dcm_locked
ad_connect sys_cpu_clk axi_ddr_cntrl/ui_addn_clk_0 ad_connect sys_cpu_clk axi_ddr_cntrl/ui_addn_clk_0
ad_connect sys_200m_clk axi_ddr_cntrl/ui_clk ad_connect sys_200m_clk axi_ddr_cntrl/ui_clk
ad_connect sys_cpu_resetn axi_ddr_cntrl/aresetn ad_connect sys_cpu_resetn axi_ddr_cntrl/aresetn
ad_connect sys_cpu_reset sys_rstgen/peripheral_reset ad_connect sys_cpu_reset sys_rstgen/peripheral_reset
ad_connect sys_cpu_resetn sys_rstgen/peripheral_aresetn ad_connect sys_cpu_resetn sys_rstgen/peripheral_aresetn
ad_connect sys_200m_reset sys_200m_rstgen/peripheral_reset
ad_connect sys_200m_resetn sys_200m_rstgen/peripheral_aresetn
# generic system clocks pointers # generic system clocks pointers
@ -178,6 +184,7 @@ set sys_dma_clk [get_bd_nets sys_200m_clk]
set sys_iodelay_clk [get_bd_nets sys_200m_clk] set sys_iodelay_clk [get_bd_nets sys_200m_clk]
ad_connect sys_cpu_clk sys_rstgen/slowest_sync_clk ad_connect sys_cpu_clk sys_rstgen/slowest_sync_clk
ad_connect sys_200m_clk sys_200m_rstgen/slowest_sync_clk
ad_connect sys_cpu_clk sys_mb/Clk ad_connect sys_cpu_clk sys_mb/Clk
ad_connect sys_cpu_clk sys_dlmb/LMB_Clk ad_connect sys_cpu_clk sys_dlmb/LMB_Clk
ad_connect sys_cpu_clk sys_ilmb/LMB_Clk ad_connect sys_cpu_clk sys_ilmb/LMB_Clk
@ -208,6 +215,8 @@ ad_connect sys_concat_intc/In15 GND
ad_connect sys_rst sys_rstgen/ext_reset_in ad_connect sys_rst sys_rstgen/ext_reset_in
ad_connect sys_rst axi_ddr_cntrl/sys_rst ad_connect sys_rst axi_ddr_cntrl/sys_rst
ad_connect sys_200m_rst sys_200m_rstgen/ext_reset_in
ad_connect sys_200m_rst axi_ddr_cntrl/ui_clk_sync_rst
ad_connect sys_clk_p axi_ddr_cntrl/sys_clk_p ad_connect sys_clk_p axi_ddr_cntrl/sys_clk_p
ad_connect sys_clk_n axi_ddr_cntrl/sys_clk_n ad_connect sys_clk_n axi_ddr_cntrl/sys_clk_n
ad_connect ddr3 axi_ddr_cntrl/DDR3 ad_connect ddr3 axi_ddr_cntrl/DDR3

24
projects/common/vcu118/vcu118_system_bd.tcl
View File

@ -68,6 +68,11 @@ ad_ip_parameter sys_mb_debug CONFIG.C_USE_UART 1
# instance: system reset/clocks # instance: system reset/clocks
ad_ip_instance proc_sys_reset sys_rstgen ad_ip_instance proc_sys_reset sys_rstgen
ad_ip_parameter sys_rstgen CONFIG.C_EXT_RST_WIDTH 1
ad_ip_instance proc_sys_reset sys_250m_rstgen
ad_ip_parameter sys_250m_rstgen CONFIG.C_EXT_RST_WIDTH 1
ad_ip_instance proc_sys_reset sys_500m_rstgen
ad_ip_parameter sys_500m_rstgen CONFIG.C_EXT_RST_WIDTH 1
# instance: ddr4 # instance: ddr4
@ -130,6 +135,8 @@ ad_connect sys_clk axi_ddr_cntrl/C0_SYS_CLK
ad_connect ddr4 axi_ddr_cntrl/C0_DDR4 ad_connect ddr4 axi_ddr_cntrl/C0_DDR4
ad_connect axi_ddr_cntrl/c0_ddr4_ui_clk_sync_rst axi_ddr_cntrl_rstgen/ext_reset_in ad_connect axi_ddr_cntrl/c0_ddr4_ui_clk_sync_rst axi_ddr_cntrl_rstgen/ext_reset_in
ad_connect axi_ddr_cntrl/c0_ddr4_ui_clk_sync_rst sys_rstgen/ext_reset_in ad_connect axi_ddr_cntrl/c0_ddr4_ui_clk_sync_rst sys_rstgen/ext_reset_in
ad_connect axi_ddr_cntrl/c0_ddr4_ui_clk_sync_rst sys_250m_rstgen/ext_reset_in
ad_connect axi_ddr_cntrl/c0_ddr4_ui_clk_sync_rst sys_500m_rstgen/ext_reset_in
ad_connect sys_mem_clk axi_ddr_cntrl/c0_ddr4_ui_clk ad_connect sys_mem_clk axi_ddr_cntrl/c0_ddr4_ui_clk
ad_connect sys_mem_clk axi_ddr_cntrl_rstgen/slowest_sync_clk ad_connect sys_mem_clk axi_ddr_cntrl_rstgen/slowest_sync_clk
ad_connect sys_cpu_clk axi_ddr_cntrl/addn_ui_clkout1 ad_connect sys_cpu_clk axi_ddr_cntrl/addn_ui_clkout1
@ -137,7 +144,15 @@ ad_connect sys_cpu_clk sys_rstgen/slowest_sync_clk
ad_connect sys_mem_resetn axi_ddr_cntrl_rstgen/peripheral_aresetn ad_connect sys_mem_resetn axi_ddr_cntrl_rstgen/peripheral_aresetn
ad_connect sys_mem_resetn axi_ddr_cntrl/c0_ddr4_aresetn ad_connect sys_mem_resetn axi_ddr_cntrl/c0_ddr4_aresetn
ad_connect sys_250m_clk axi_ddr_cntrl/addn_ui_clkout2 ad_connect sys_250m_clk axi_ddr_cntrl/addn_ui_clkout2
ad_connect sys_250m_clk sys_250m_rstgen/slowest_sync_clk
ad_connect sys_500m_clk axi_ddr_cntrl/addn_ui_clkout3 ad_connect sys_500m_clk axi_ddr_cntrl/addn_ui_clkout3
ad_connect sys_500m_clk sys_500m_rstgen/slowest_sync_clk
ad_connect sys_cpu_reset sys_rstgen/peripheral_reset
ad_connect sys_cpu_resetn sys_rstgen/peripheral_aresetn
ad_connect sys_250m_reset sys_250m_rstgen/peripheral_reset
ad_connect sys_250m_resetn sys_250m_rstgen/peripheral_aresetn
ad_connect sys_500m_reset sys_500m_rstgen/peripheral_reset
ad_connect sys_500m_resetn sys_500m_rstgen/peripheral_aresetn
# generic system clocks pointers # generic system clocks pointers
@ -145,10 +160,15 @@ set sys_cpu_clk [get_bd_nets sys_cpu_clk]
set sys_dma_clk [get_bd_nets sys_250m_clk] set sys_dma_clk [get_bd_nets sys_250m_clk]
set sys_iodelay_clk [get_bd_nets sys_500m_clk] set sys_iodelay_clk [get_bd_nets sys_500m_clk]
set sys_cpu_reset [get_bd_nets sys_cpu_reset]
set sys_cpu_resetn [get_bd_nets sys_cpu_resetn]
set sys_dma_reset [get_bd_nets sys_250m_reset]
set sys_dma_resetn [get_bd_nets sys_250m_resetn]
set sys_iodelay_reset [get_bd_nets sys_500m_reset]
set sys_iodelay_resetn [get_bd_nets sys_500m_resetn]
# microblaze debug & interrupt # microblaze debug & interrupt
ad_connect sys_cpu_reset sys_rstgen/peripheral_reset
ad_connect sys_cpu_resetn sys_rstgen/peripheral_aresetn
ad_connect sys_cpu_clk sys_mb/Clk ad_connect sys_cpu_clk sys_mb/Clk
ad_connect sys_cpu_clk sys_dlmb/LMB_Clk ad_connect sys_cpu_clk sys_dlmb/LMB_Clk
ad_connect sys_cpu_clk sys_ilmb/LMB_Clk ad_connect sys_cpu_clk sys_ilmb/LMB_Clk

13
projects/common/zc702/zc702_system_bd.tcl
View File

@ -71,6 +71,8 @@ ad_ip_parameter sys_concat_intc CONFIG.NUM_PORTS 16
ad_ip_instance proc_sys_reset sys_rstgen ad_ip_instance proc_sys_reset sys_rstgen
ad_ip_parameter sys_rstgen CONFIG.C_EXT_RST_WIDTH 1 ad_ip_parameter sys_rstgen CONFIG.C_EXT_RST_WIDTH 1
ad_ip_instance proc_sys_reset sys_200m_rstgen
ad_ip_parameter sys_200m_rstgen CONFIG.C_EXT_RST_WIDTH 1
# hdmi peripherals # hdmi peripherals
@ -109,6 +111,10 @@ ad_connect sys_cpu_reset sys_rstgen/peripheral_reset
ad_connect sys_cpu_resetn sys_rstgen/peripheral_aresetn ad_connect sys_cpu_resetn sys_rstgen/peripheral_aresetn
ad_connect sys_cpu_clk sys_rstgen/slowest_sync_clk ad_connect sys_cpu_clk sys_rstgen/slowest_sync_clk
ad_connect sys_rstgen/ext_reset_in sys_ps7/FCLK_RESET0_N ad_connect sys_rstgen/ext_reset_in sys_ps7/FCLK_RESET0_N
ad_connect sys_200m_reset sys_200m_rstgen/peripheral_reset
ad_connect sys_200m_resetn sys_200m_rstgen/peripheral_aresetn
ad_connect sys_200m_clk sys_200m_rstgen/slowest_sync_clk
ad_connect sys_200m_rstgen/ext_reset_in sys_ps7/FCLK_RESET1_N
# generic system clocks pointers # generic system clocks pointers
@ -116,6 +122,13 @@ set sys_cpu_clk [get_bd_nets sys_cpu_clk]
set sys_dma_clk [get_bd_nets sys_200m_clk] set sys_dma_clk [get_bd_nets sys_200m_clk]
set sys_iodelay_clk [get_bd_nets sys_200m_clk] set sys_iodelay_clk [get_bd_nets sys_200m_clk]
set sys_cpu_reset [get_bd_nets sys_cpu_reset]
set sys_cpu_resetn [get_bd_nets sys_cpu_resetn]
set sys_dma_reset [get_bd_nets sys_200m_reset]
set sys_dma_resetn [get_bd_nets sys_200m_resetn]
set sys_iodelay_reset [get_bd_nets sys_200m_reset]
set sys_iodelay_resetn [get_bd_nets sys_200m_resetn]
# interface connections # interface connections
ad_connect ddr sys_ps7/DDR ad_connect ddr sys_ps7/DDR

6
projects/common/zc706/zc706_system_bd.tcl
View File

@ -72,6 +72,8 @@ ad_ip_parameter sys_concat_intc CONFIG.NUM_PORTS 16
ad_ip_instance proc_sys_reset sys_rstgen ad_ip_instance proc_sys_reset sys_rstgen
ad_ip_parameter sys_rstgen CONFIG.C_EXT_RST_WIDTH 1 ad_ip_parameter sys_rstgen CONFIG.C_EXT_RST_WIDTH 1
ad_ip_instance proc_sys_reset sys_200m_rstgen
ad_ip_parameter sys_200m_rstgen CONFIG.C_EXT_RST_WIDTH 1
# hdmi peripherals # hdmi peripherals
@ -110,6 +112,10 @@ ad_connect sys_cpu_reset sys_rstgen/peripheral_reset
ad_connect sys_cpu_resetn sys_rstgen/peripheral_aresetn ad_connect sys_cpu_resetn sys_rstgen/peripheral_aresetn
ad_connect sys_cpu_clk sys_rstgen/slowest_sync_clk ad_connect sys_cpu_clk sys_rstgen/slowest_sync_clk
ad_connect sys_rstgen/ext_reset_in sys_ps7/FCLK_RESET0_N ad_connect sys_rstgen/ext_reset_in sys_ps7/FCLK_RESET0_N
ad_connect sys_200m_reset sys_200m_rstgen/peripheral_reset
ad_connect sys_200m_resetn sys_200m_rstgen/peripheral_aresetn
ad_connect sys_200m_clk sys_200m_rstgen/slowest_sync_clk
ad_connect sys_200m_rstgen/ext_reset_in sys_ps7/FCLK_RESET1_N
# generic system clocks pointers # generic system clocks pointers

35
projects/common/zcu102/zcu102_system_bd.tcl
View File

@ -52,24 +52,47 @@ set_property -dict [list \
CONFIG.PSU__CRL_APB__SPI1_REF_CTRL__FREQMHZ 100 \ CONFIG.PSU__CRL_APB__SPI1_REF_CTRL__FREQMHZ 100 \
] [get_bd_cells sys_ps8] ] [get_bd_cells sys_ps8]
# processor system reset instances for all the three system clocks
ad_ip_instance proc_sys_reset sys_rstgen ad_ip_instance proc_sys_reset sys_rstgen
ad_ip_parameter sys_rstgen CONFIG.C_EXT_RST_WIDTH 1 ad_ip_parameter sys_rstgen CONFIG.C_EXT_RST_WIDTH 1
ad_ip_instance proc_sys_reset sys_250m_rstgen
ad_ip_parameter sys_250m_rstgen CONFIG.C_EXT_RST_WIDTH 1
ad_ip_instance proc_sys_reset sys_500m_rstgen
ad_ip_parameter sys_500m_rstgen CONFIG.C_EXT_RST_WIDTH 1
# system reset/clock definitions # system reset/clock definitions
ad_connect sys_cpu_clk sys_ps8/pl_clk0 ad_connect sys_cpu_clk sys_ps8/pl_clk0
ad_connect sys_250m_clk sys_ps8/pl_clk1 ad_connect sys_250m_clk sys_ps8/pl_clk1
ad_connect sys_500m_clk sys_ps8/pl_clk2 ad_connect sys_500m_clk sys_ps8/pl_clk2
ad_connect sys_ps8/pl_resetn0 sys_rstgen/ext_reset_in
ad_connect sys_cpu_clk sys_rstgen/slowest_sync_clk
ad_connect sys_ps8/pl_resetn0 sys_250m_rstgen/ext_reset_in
ad_connect sys_250m_clk sys_250m_rstgen/slowest_sync_clk
ad_connect sys_ps8/pl_resetn0 sys_500m_rstgen/ext_reset_in
ad_connect sys_500m_clk sys_500m_rstgen/slowest_sync_clk
ad_connect sys_cpu_reset sys_rstgen/peripheral_reset ad_connect sys_cpu_reset sys_rstgen/peripheral_reset
ad_connect sys_cpu_resetn sys_rstgen/peripheral_aresetn ad_connect sys_cpu_resetn sys_rstgen/peripheral_aresetn
ad_connect sys_cpu_clk sys_rstgen/slowest_sync_clk ad_connect sys_250m_reset sys_250m_rstgen/peripheral_reset
ad_connect sys_ps8/pl_resetn0 sys_rstgen/ext_reset_in ad_connect sys_250m_resetn sys_250m_rstgen/peripheral_aresetn
ad_connect sys_500m_reset sys_500m_rstgen/peripheral_reset
ad_connect sys_500m_resetn sys_500m_rstgen/peripheral_aresetn
# generic system clocks pointers # generic system clocks&resets pointers
set sys_cpu_clk [get_bd_nets sys_cpu_clk] set sys_cpu_clk [get_bd_nets sys_cpu_clk]
set sys_dma_clk [get_bd_nets sys_250m_clk] set sys_dma_clk [get_bd_nets sys_250m_clk]
set sys_iodelay_clk [get_bd_nets sys_500m_clk] set sys_iodelay_clk [get_bd_nets sys_500m_clk]
set sys_cpu_reset [get_bd_nets sys_cpu_reset]
set sys_cpu_resetn [get_bd_nets sys_cpu_resetn]
set sys_dma_reset [get_bd_nets sys_250m_reset]
set sys_dma_resetn [get_bd_nets sys_250m_resetn]
set sys_iodelay_reset [get_bd_nets sys_500m_reset]
set sys_iodelay_resetn [get_bd_nets sys_500m_resetn]
# gpio # gpio

19
projects/common/zed/zed_system_bd.tcl
View File

@ -92,6 +92,8 @@ ad_ip_parameter sys_concat_intc CONFIG.NUM_PORTS 16
ad_ip_instance proc_sys_reset sys_rstgen ad_ip_instance proc_sys_reset sys_rstgen
ad_ip_parameter sys_rstgen CONFIG.C_EXT_RST_WIDTH 1 ad_ip_parameter sys_rstgen CONFIG.C_EXT_RST_WIDTH 1
ad_ip_instance proc_sys_reset sys_200m_rstgen
ad_ip_parameter sys_200m_rstgen CONFIG.C_EXT_RST_WIDTH 1
ad_ip_instance util_vector_logic sys_logic_inv ad_ip_instance util_vector_logic sys_logic_inv
ad_ip_parameter sys_logic_inv CONFIG.C_SIZE 1 ad_ip_parameter sys_logic_inv CONFIG.C_SIZE 1
@ -142,12 +144,23 @@ ad_connect sys_cpu_reset sys_rstgen/peripheral_reset
ad_connect sys_cpu_resetn sys_rstgen/peripheral_aresetn ad_connect sys_cpu_resetn sys_rstgen/peripheral_aresetn
ad_connect sys_cpu_clk sys_rstgen/slowest_sync_clk ad_connect sys_cpu_clk sys_rstgen/slowest_sync_clk
ad_connect sys_rstgen/ext_reset_in sys_ps7/FCLK_RESET0_N ad_connect sys_rstgen/ext_reset_in sys_ps7/FCLK_RESET0_N
ad_connect sys_200m_reset sys_200m_rstgen/peripheral_reset
ad_connect sys_200m_resetn sys_200m_rstgen/peripheral_aresetn
ad_connect sys_200m_clk sys_200m_rstgen/slowest_sync_clk
ad_connect sys_200m_rstgen/ext_reset_in sys_ps7/FCLK_RESET1_N
# generic system clocks pointers # generic system clocks pointers
set sys_cpu_clk [get_bd_nets sys_cpu_clk] set sys_cpu_clk [get_bd_nets sys_cpu_clk]
set sys_dma_clk [get_bd_nets sys_200m_clk] set sys_dma_clk [get_bd_nets sys_200m_clk]
set sys_iodelay_clk [get_bd_nets sys_200m_clk] set sys_iodelay_clk [get_bd_nets sys_200m_clk]
set sys_cpu_reset [get_bd_nets sys_cpu_reset]
set sys_cpu_resetn [get_bd_nets sys_cpu_resetn]
set sys_dma_reset [get_bd_nets sys_200m_reset]
set sys_dma_resetn [get_bd_nets sys_200m_resetn]
set sys_iodelay_reset [get_bd_nets sys_200m_reset]
set sys_iodelay_resetn [get_bd_nets sys_200m_resetn]
# interface connections # interface connections